From: Luke Kenneth Casson Leighton Date: Thu, 29 Mar 2018 08:23:51 +0000 (+0100) Subject: stronger autopep8 whitespace cleanup X-Git-Url: https://git.libre-soc.org/?p=pinmux.git;a=commitdiff_plain;h=8c53871783e801b11f335423c8115de502d921d0 stronger autopep8 whitespace cleanup --- diff --git a/Makefile b/Makefile index d546003..e26327d 100644 --- a/Makefile +++ b/Makefile @@ -44,4 +44,4 @@ clean: rm -rf verilog obj_dir test/bsv_src src/*.pyc pep8: - autopep8 -r -i src + autopep8 -a -a -a --experimental -r -i src diff --git a/src/bsv/actual_pinmux.py b/src/bsv/actual_pinmux.py index 2be8fc9..7dd3665 100644 --- a/src/bsv/actual_pinmux.py +++ b/src/bsv/actual_pinmux.py @@ -53,7 +53,7 @@ def init(p, ifaces): # since the interfaces are always standard and cannot change from # user-to-user. Plus this also reduces human-error as well :) for i in range(0, len(cell) - 1): - cname = cell[i+1] + cname = cell[i + 1] temp = transfn(cname) x = ifaces.getifacetype(temp) print cname, temp, x diff --git a/src/bsv/pinmux_generator.py b/src/bsv/pinmux_generator.py index 7f8f1a5..4635d77 100644 --- a/src/bsv/pinmux_generator.py +++ b/src/bsv/pinmux_generator.py @@ -148,8 +148,11 @@ def pinmuxgen(pth=None, verify=True): interface mux_lines = interface MuxSelectionLines ''') for cell in p.muxed_cells: - bsv_file.write(mux_interface.ifacedef(cell[0], - int(math.log(len(cell) - 1, 2)))) + bsv_file.write( + mux_interface.ifacedef( + cell[0], int( + math.log( + len(cell) - 1, 2)))) bsv_file.write(''' endinterface; interface peripheral_side = interface PeripheralSide diff --git a/src/pinmux_generator.py b/src/pinmux_generator.py index cff59d1..6b84525 100644 --- a/src/pinmux_generator.py +++ b/src/pinmux_generator.py @@ -72,7 +72,7 @@ if __name__ == '__main__': sys.exit(0) if pinspec: - if not modules.has_key(pinspec): + if pinspec not in modules: print "ERROR: spec type '%s' does not exist" % pinspec printhelp() sys.exit(1) @@ -81,7 +81,7 @@ if __name__ == '__main__': specgen(output_dir, pinout, bankspec, fixedpins) else: gentypes = {'bsv': bsvgen} - if not gentypes.has_key(output_type): + if output_type not in gentypes: print "ERROR: output type '%s' does not exist" % output_type printhelp() sys.exit(0) diff --git a/src/spec/c_class.py b/src/spec/c_class.py index e5f913b..afe43f2 100644 --- a/src/spec/c_class.py +++ b/src/spec/c_class.py @@ -21,8 +21,7 @@ def pinspec(): 'G': 24, } bankspec = {} - pkeys = pinbanks.keys() - pkeys.sort() + pkeys = sorted(pinbanks.keys()) offs = 0 for kn in pkeys: bankspec[kn] = offs @@ -49,7 +48,7 @@ def pinspec(): pinmerge(pinouts, i2c(bankspec, "3", ('B', 12), "B", 1)) pinmerge(pinouts, uart(bankspec, "5", ('B', 14), "B", 1)) for i in range(16): - pinmerge(pinouts, pwm(bankspec, str(i+16), ('B', i), "B", mux=2)) + pinmerge(pinouts, pwm(bankspec, str(i + 16), ('B', i), "B", mux=2)) # Bank C, 32-47 pinmerge(pinouts, gpio(bankspec, "", ('C', 0), "C", 0, 16, 0)) @@ -102,43 +101,82 @@ def pinspec(): print fixedpins = { - 'CTRL_SYS': - [ - 'TEST', 'BOOT_SEL', - 'NMI#', 'RESET#', - 'CLK24M_IN', 'CLK24M_OUT', - 'CLK32K_IN', 'CLK32K_OUT', - 'PLLTEST', 'PLLREGIO', 'PLLVP25', - 'PLLDV', 'PLLVREG', 'PLLGND', + 'CTRL_SYS': [ + 'TEST', + 'BOOT_SEL', + 'NMI#', + 'RESET#', + 'CLK24M_IN', + 'CLK24M_OUT', + 'CLK32K_IN', + 'CLK32K_OUT', + 'PLLTEST', + 'PLLREGIO', + 'PLLVP25', + 'PLLDV', + 'PLLVREG', + 'PLLGND', ], - - 'POWER_CPU': - ['VDD0_CPU', 'VDD1_CPU', 'VDD2_CPU', 'VDD3_CPU', 'VDD4_CPU', 'VDD5_CPU', - 'GND0_CPU', 'GND1_CPU', 'GND2_CPU', 'GND3_CPU', 'GND4_CPU', 'GND5_CPU', - ], - - 'POWER_DLL': - ['VDD0_DLL', 'VDD1_DLL', 'VDD2_DLL', - 'GND0_DLL', 'GND1_DLL', 'GND2_DLL', - ], - - 'POWER_INT': - ['VDD0_INT', 'VDD1_INT', 'VDD2_INT', 'VDD3_INT', 'VDD4_INT', - 'VDD5_INT', 'VDD6_INT', 'VDD7_INT', 'VDD8_INT', 'VDD9_INT', - 'GND0_INT', 'GND1_INT', 'GND2_INT', 'GND3_INT', 'GND4_INT', - 'GND5_INT', 'GND6_INT', 'GND7_INT', 'GND8_INT', 'GND9_INT', - ], - - 'POWER_GPIO': - ['VDD_GPIOA', 'VDD_GPIOB', 'VDD_GPIOC', - 'VDD_GPIOD', 'VDD_GPIOE', 'VDD_GPIOF', - 'VDD_GPIOG', - 'GND_GPIOA', 'GND_GPIOB', 'GND_GPIOC', - 'GND_GPIOD', 'GND_GPIOE', 'GND_GPIOF', - 'GND_GPIOG', - ] - - } + 'POWER_CPU': [ + 'VDD0_CPU', + 'VDD1_CPU', + 'VDD2_CPU', + 'VDD3_CPU', + 'VDD4_CPU', + 'VDD5_CPU', + 'GND0_CPU', + 'GND1_CPU', + 'GND2_CPU', + 'GND3_CPU', + 'GND4_CPU', + 'GND5_CPU', + ], + 'POWER_DLL': [ + 'VDD0_DLL', + 'VDD1_DLL', + 'VDD2_DLL', + 'GND0_DLL', + 'GND1_DLL', + 'GND2_DLL', + ], + 'POWER_INT': [ + 'VDD0_INT', + 'VDD1_INT', + 'VDD2_INT', + 'VDD3_INT', + 'VDD4_INT', + 'VDD5_INT', + 'VDD6_INT', + 'VDD7_INT', + 'VDD8_INT', + 'VDD9_INT', + 'GND0_INT', + 'GND1_INT', + 'GND2_INT', + 'GND3_INT', + 'GND4_INT', + 'GND5_INT', + 'GND6_INT', + 'GND7_INT', + 'GND8_INT', + 'GND9_INT', + ], + 'POWER_GPIO': [ + 'VDD_GPIOA', + 'VDD_GPIOB', + 'VDD_GPIOC', + 'VDD_GPIOD', + 'VDD_GPIOE', + 'VDD_GPIOF', + 'VDD_GPIOG', + 'GND_GPIOA', + 'GND_GPIOB', + 'GND_GPIOC', + 'GND_GPIOD', + 'GND_GPIOE', + 'GND_GPIOF', + 'GND_GPIOG', + ]} display_fixed(fixedpins, len(pinouts)) diff --git a/src/spec/gen.py b/src/spec/gen.py index ad9fa0e..36b815e 100644 --- a/src/spec/gen.py +++ b/src/spec/gen.py @@ -21,7 +21,7 @@ def specgen(pth, pinouts, bankspec, fixedpins): if len(s0.pingroup) == 1: # only one function, grouped higher for ks in s.keys(): # grouped by interface assert False, "TODO, single-function" - fntype = 'inout' # XXX TODO + fntype = 'inout' # XXX TODO k = s[ks].suffix k_ = k.lower() g.write("%s\t%s\n" % (k_, fntype)) @@ -31,8 +31,7 @@ def specgen(pth, pinouts, bankspec, fixedpins): pn = pinname.lower() g.write("%s\t%s\n" % (pn, fntype)) - pks = pinouts.keys() - pks.sort() + pks = sorted(pinouts.keys()) # truly dreadful way to work out the max mux size... muxsz = 0 @@ -46,14 +45,14 @@ def specgen(pth, pinouts, bankspec, fixedpins): res = [str(k)] # append pin mux for midx in range(muxsz): - if pinouts[k].has_key(midx): + if midx in pinouts[k]: fname = pinouts[k][midx][0] else: fname = '' res.append(fname.lower()) g.write('\t'.join(res) + '\n') - # ... and the dedicated pins + # ... and the dedicated pins with open(os.path.join(pth, 'fixedpins.txt'), 'w') as g: for p in fixedpins: p = map(str, p) diff --git a/src/spec/ifaceprint.py b/src/spec/ifaceprint.py index 642e8a8..5236a03 100644 --- a/src/spec/ifaceprint.py +++ b/src/spec/ifaceprint.py @@ -6,13 +6,12 @@ from copy import deepcopy def display(pins): print "| Pin | Mux0 | Mux1 | Mux2 | Mux3 |" print "| --- | ----------- | ----------- | ----------- | ----------- |" - pinidx = pins.keys() - pinidx.sort() + pinidx = sorted(pins.keys()) for pin in pinidx: pdata = pins.get(pin) res = '| %3d |' % pin for mux in range(4): - if not pdata.has_key(mux): + if mux not in pdata: res += " |" continue name, bank = pdata[mux] @@ -56,13 +55,13 @@ def display_fns(bankspec, pins, function_names): fns = {} for (pin, pdata) in pins.items(): for mux in range(1, 4): # skip GPIO for now - if not pdata.has_key(mux): + if mux not in pdata: continue name, bank = pdata[mux] - assert name != None, str(bank) - if not fns.has_key(name): + assert name is not None, str(bank) + if name not in fns: fns[name] = [] - fns[name].append((pin-bankspec[bank], mux, bank)) + fns[name].append((pin - bankspec[bank], mux, bank)) fnidx = fns.keys() fnidx.sort(fnsort) @@ -99,7 +98,7 @@ def check_functions(title, bankspec, fns, pins, required, eint, pwm, for name in required: print "## %s" % name print - if descriptions and descriptions.has_key(name): + if descriptions and name in descriptions: print descriptions[name] print @@ -132,11 +131,10 @@ def check_functions(title, bankspec, fns, pins, required, eint, pwm, if findmux != mux: continue pin_ = pin + bankspec[bank] - if pins.has_key(pin_): + if pin_ in pins: pinfound[pin_] = (fname, pin_, bank, pin, mux) - pinidx = pinfound.keys() - pinidx.sort() + pinidx = sorted(pinfound.keys()) for pin_ in pinidx: fname, pin_, bank, pin, mux = pinfound[pin_] @@ -168,12 +166,12 @@ def check_functions(title, bankspec, fns, pins, required, eint, pwm, if fname in found: continue desc = '' - if descriptions and descriptions.has_key(fname): + if descriptions and fname in descriptions: desc = ': %s' % descriptions[fname] bank = fname[4] pin = int(fname[7:]) pin_ = pin + bankspec[bank] - if not pins.has_key(pin_): + if pin_ not in pins: continue del pins[pin_] found.add(fname) @@ -187,7 +185,7 @@ def check_functions(title, bankspec, fns, pins, required, eint, pwm, print "## Unused Pinouts (spare as GPIO) for '%s'" % title print - if descriptions and descriptions.has_key('GPIO'): + if descriptions and 'GPIO' in descriptions: print descriptions['GPIO'] print display(pins) @@ -203,7 +201,7 @@ def display_group(bankspec, title, todisplay, fns, pins, descriptions): found = set() for fname in todisplay: desc = '' - if descriptions and descriptions.has_key(fname): + if descriptions and fname in descriptions: desc = ': %s' % descriptions[fname] fname = fname.split(':') if len(fname) == 2: @@ -223,7 +221,7 @@ def display_group(bankspec, title, todisplay, fns, pins, descriptions): if fname in found: continue pin_ = pin + bankspec[bank] - if not pins.has_key(pin_): + if pin_ not in pins: continue del pins[pin_] found.add(fname) @@ -233,8 +231,7 @@ def display_group(bankspec, title, todisplay, fns, pins, descriptions): def display_fixed(fixed, offs): - fkeys = fixed.keys() - fkeys.sort() + fkeys = sorted(fixed.keys()) pin_ = offs res = [] for pin, k in enumerate(fkeys): diff --git a/src/spec/interfaces.py b/src/spec/interfaces.py index ceceaf9..17fab16 100644 --- a/src/spec/interfaces.py +++ b/src/spec/interfaces.py @@ -9,13 +9,13 @@ class Pinouts(object): self.fnspec = {} def has_key(self, k): - return self.pins.has_key(k) + return k in self.pins def add_spec(self, k, v): self.fnspec[k] = v def update(self, pinidx, v): - if not self.pins.has_key(pinidx): + if pinidx not in self.pins: self.pins[pinidx] = v else: self.pins[pinidx].update(v) @@ -42,7 +42,7 @@ class Pinouts(object): class Pins(object): def __init__(self, fname, pingroup, bankspec, suffix, offs, bank, mux, - spec=None, limit=None, origsuffix=None): + spec=None, limit=None, origsuffix=None): # function type can be in, out or inout, represented by - + * # strip function type out of each pin name @@ -69,7 +69,7 @@ class Pins(object): # create consistent name suffixes pingroup = namesuffix(fname, suffix, pingroup) - suffix = '' # hack + suffix = '' # hack res = {} names = {} @@ -79,7 +79,7 @@ class Pins(object): name_ = "%s_%s" % (name, suffix) else: name_ = name - if spec and spec.has_key(name): + if spec and name in spec: continue pin = {mux: (name_, bank)} offs_bank, offs_ = offs @@ -95,12 +95,12 @@ class Pins(object): name_ = name if not spec: continue - if not spec.has_key(name): + if name not in spec: continue idx_, mux_, bank_ = spec[name] idx_ = names[idx_] pin = {mux_: (name_, bank_)} - if res.has_key(idx_): + if idx_ in res: res[idx_].update(pin) else: res[idx_] = pin @@ -110,11 +110,12 @@ class Pins(object): def i2s(bankspec, suffix, offs, bank, mux=1, spec=None, limit=None): i2spins = ['MCK+', 'BCK+', 'LRCK+', 'DI-', 'DO+'] - #for i in range(4): + # for i in range(4): # i2spins.append("DO%d+" % i) return Pins('IIS', i2spins, bankspec, suffix, offs, bank, mux, spec, limit, origsuffix=suffix) + def emmc(bankspec, suffix, offs, bank, mux=1, spec=None): emmcpins = ['CMD+', 'CLK+'] for i in range(8): @@ -122,8 +123,9 @@ def emmc(bankspec, suffix, offs, bank, mux=1, spec=None): return Pins('MMC', emmcpins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def sdmmc(bankspec, suffix, offs, bank, mux=1, spec=None, - start=None, limit=None): + start=None, limit=None): sdmmcpins = ['CMD+', 'CLK+'] for i in range(4): sdmmcpins.append("D%d*" % i) @@ -131,31 +133,46 @@ def sdmmc(bankspec, suffix, offs, bank, mux=1, spec=None, return Pins('SD', sdmmcpins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def spi(bankspec, suffix, offs, bank, mux=1, spec=None): spipins = ['CLK*', 'NSS*', 'MOSI*', 'MISO*'] return Pins('SPI', spipins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def quadspi(bankspec, suffix, offs, bank, mux=1, spec=None, limit=None): spipins = ['CK*', 'NSS*', 'IO0*', 'IO1*', 'IO2*', 'IO3*'] - return Pins('QSPI', spipins, bankspec, suffix, offs, bank, mux, spec, limit, - origsuffix=suffix) + return Pins( + 'QSPI', + spipins, + bankspec, + suffix, + offs, + bank, + mux, + spec, + limit, + origsuffix=suffix) + def i2c(bankspec, suffix, offs, bank, mux=1, spec=None): spipins = ['SDA*', 'SCL*'] return Pins('TWI', spipins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def jtag(bankspec, suffix, offs, bank, mux=1, spec=None): jtagpins = ['MS+', 'DI-', 'DO+', 'CK+'] return Pins('JTAG', jtagpins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def uart(bankspec, suffix, offs, bank, mux=1, spec=None): uartpins = ['TX+', 'RX-'] return Pins('UART', uartpins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def namesuffix(name, suffix, namelist): names = [] for n in namelist: @@ -165,6 +182,7 @@ def namesuffix(name, suffix, namelist): names.append("%s_%s" % (name, suffix)) return names + def ulpi(bankspec, suffix, offs, bank, mux=1, spec=None): ulpipins = ['CK+', 'DIR+', 'STP+', 'NXT+'] for i in range(8): @@ -172,11 +190,13 @@ def ulpi(bankspec, suffix, offs, bank, mux=1, spec=None): return Pins('ULPI', ulpipins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def uartfull(bankspec, suffix, offs, bank, mux=1, spec=None): uartpins = ['TX+', 'RX-', 'CTS-', 'RTS+'] return Pins('UARTQ', uartpins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def rgbttl(bankspec, suffix, offs, bank, mux=1, spec=None): ttlpins = ['CK+', 'DE+', 'HS+', 'VS+'] for i in range(24): @@ -184,6 +204,7 @@ def rgbttl(bankspec, suffix, offs, bank, mux=1, spec=None): return Pins('LCD', ttlpins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def rgmii(bankspec, suffix, offs, bank, mux=1, spec=None): buspins = [] for i in range(4): @@ -197,6 +218,7 @@ def rgmii(bankspec, suffix, offs, bank, mux=1, spec=None): return Pins('RG', buspins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def flexbus1(bankspec, suffix, offs, bank, mux=1, spec=None, limit=None): buspins = [] for i in range(8): @@ -208,18 +230,20 @@ def flexbus1(bankspec, suffix, offs, bank, mux=1, spec=None, limit=None): 'TSIZ0', 'TSIZ1'] for i in range(4): buspins.append("BWE%d" % i) - for i in range(2,6): + for i in range(2, 6): buspins.append("CS%d+" % i) return Pins('FB', buspins, bankspec, suffix, offs, bank, mux, spec, limit, origsuffix=suffix) + def flexbus2(bankspec, suffix, offs, bank, mux=1, spec=None, limit=None): buspins = [] - for i in range(8,32): + for i in range(8, 32): buspins.append("AD%d*" % i) return Pins('FB', buspins, bankspec, suffix, offs, bank, mux, spec, limit, origsuffix=suffix) + def sdram1(bankspec, suffix, offs, bank, mux=1, spec=None): buspins = [] for i in range(16): @@ -239,21 +263,23 @@ def sdram1(bankspec, suffix, offs, bank, mux=1, spec=None): return Pins('SDR', buspins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def sdram2(bankspec, suffix, offs, bank, mux=1, spec=None, limit=None): buspins = [] - for i in range(3,6): + for i in range(3, 6): buspins.append("SDRCS%d#+" % i) - for i in range(8,32): + for i in range(8, 32): buspins.append("SDRDQ%d*" % i) return Pins('SDR', buspins, bankspec, suffix, offs, bank, mux, spec, limit, origsuffix=suffix) + def mcu8080(bankspec, suffix, offs, bank, mux=1, spec=None): buspins = [] for i in range(8): buspins.append("MCUD%d*" % i) for i in range(8): - buspins.append("MCUAD%d+" % (i+8)) + buspins.append("MCUAD%d+" % (i + 8)) for i in range(6): buspins.append("MCUCS%d+" % i) for i in range(2): @@ -263,32 +289,37 @@ def mcu8080(bankspec, suffix, offs, bank, mux=1, spec=None): return Pins('MCU', buspins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def _pinbank(bankspec, prefix, suffix, offs, bank, gpiooffs, gpionum=1, mux=1, spec=None): gpiopins = [] - for i in range(gpiooffs, gpiooffs+gpionum): + for i in range(gpiooffs, gpiooffs + gpionum): gpiopins.append("%s%d*" % (bank, i)) return Pins(prefix, gpiopins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def eint(bankspec, suffix, offs, bank, gpiooffs, gpionum=1, mux=1, spec=None): gpiopins = [] - for i in range(gpiooffs, gpiooffs+gpionum): + for i in range(gpiooffs, gpiooffs + gpionum): gpiopins.append("%d*" % (i)) return Pins('EINT', gpiopins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def pwm(bankspec, suffix, offs, bank, pwmoffs, pwmnum=1, mux=1, spec=None): pwmpins = [] - for i in range(pwmoffs, pwmoffs+pwmnum): + for i in range(pwmoffs, pwmoffs + pwmnum): pwmpins.append("%d+" % (i)) return Pins('PWM', pwmpins, bankspec, suffix, offs, bank, mux, spec, origsuffix=suffix) + def gpio(bankspec, suffix, offs, bank, gpiooffs, gpionum=1, mux=1, spec=None): return _pinbank(bankspec, "GPIO%s" % bank, suffix, offs, bank, gpiooffs, gpionum, mux=0, spec=None) + def pinmerge(pins, fn): # hack, store the function specs in the pins dict fname = fn.fname @@ -299,15 +330,15 @@ def pinmerge(pins, fn): pins.fnspec = pins if fname == 'GPIO': fname = fname + bank - assert not pins.has_key('EINT') - if not pins.fnspec.has_key(fname): + assert 'EINT' not in pins + if fname not in pins.fnspec: pins.add_spec(fname, {}) print "fname bank suffix", fname, bank, suffix if suffix or fname == 'EINT' or fname == 'PWM': specname = fname + suffix else: specname = fname + bank - if pins.fnspec[fname].has_key(specname): + if specname in pins.fnspec[fname]: # ok so some declarations may bring in different # names at different stages (EINT, PWM, flexbus1/2) # so we have to merge the names in. main thing is @@ -324,4 +355,3 @@ def pinmerge(pins, fn): # merge actual pins for (pinidx, v) in fn.pins.items(): pins.update(pinidx, v) - diff --git a/src/spec/m_class.py b/src/spec/m_class.py index b9b2c7c..a43dc4a 100644 --- a/src/spec/m_class.py +++ b/src/spec/m_class.py @@ -22,8 +22,7 @@ def pinspec(): 'G': 32, } bankspec = {} - pkeys = pinbanks.keys() - pkeys.sort() + pkeys = sorted(pinbanks.keys()) offs = 0 for kn in pkeys: bankspec[kn] = offs @@ -152,69 +151,186 @@ def pinspec(): print fixedpins = { - 'DDR3': - ['SDQ0', 'SDQ1', 'SDQ2', 'SDQ3', 'SDQ4', 'SDQ5', 'SDQ6', 'SDQ7', - 'SDQ8', 'SDQ9', 'SDQ10', 'SDQ11', 'SDQ12', 'SDQ13', 'SDQ14', 'SDQ15', - 'SDQ16', 'SDQ17', 'SDQ18', 'SDQ19', 'SDQ20', 'SDQ21', 'SDQ22', 'SDQ23', - 'SDQ24', 'SDQ25', 'SDQ26', 'SDQ27', 'SDQ28', 'SDQ29', 'SDQ30', 'SDQ31', - 'SVREF0', 'SVREF1', 'SVREF2', 'SVREF3', - 'SDQS0', 'SDQS0#', 'SDQS1', 'SDQS1#', - 'SDQS2', 'SDQS2#', 'SDQS3', 'SDQS3#', - 'SDQM0', 'SDQM1', 'SDQM2', 'SDQM3', - 'SCK#', 'SCK', 'SCKE0', 'SCKE1', - 'SA0', 'SA1', 'SA2', 'SA3', 'SA4', 'SA5', 'SA6', 'SA7', - 'SA8', 'SA9', 'SA10', 'SA11', 'SA12', 'SA13', 'SA14', - 'SBA0', 'SBA1', 'SBA2', - 'SWE', 'SCAS', 'SRAS', - 'SCS0', 'SCS1', - 'SZQ', 'SRST', - 'SDBG0', 'SDBG1', 'ADBG', - 'ODT0', 'ODT1' - ], - - 'CTRL_SYS': - [ - 'TEST', 'JTAG_SEL', 'UBOOT_SEL', - 'NMI#', 'RESET#', - 'CLK24M_IN', 'CLK24M_OUT', - 'PLLTEST', 'PLLREGIO', 'PLLVP25', - 'PLLDV', 'PLLVREG', 'PLLGND', + 'DDR3': [ + 'SDQ0', + 'SDQ1', + 'SDQ2', + 'SDQ3', + 'SDQ4', + 'SDQ5', + 'SDQ6', + 'SDQ7', + 'SDQ8', + 'SDQ9', + 'SDQ10', + 'SDQ11', + 'SDQ12', + 'SDQ13', + 'SDQ14', + 'SDQ15', + 'SDQ16', + 'SDQ17', + 'SDQ18', + 'SDQ19', + 'SDQ20', + 'SDQ21', + 'SDQ22', + 'SDQ23', + 'SDQ24', + 'SDQ25', + 'SDQ26', + 'SDQ27', + 'SDQ28', + 'SDQ29', + 'SDQ30', + 'SDQ31', + 'SVREF0', + 'SVREF1', + 'SVREF2', + 'SVREF3', + 'SDQS0', + 'SDQS0#', + 'SDQS1', + 'SDQS1#', + 'SDQS2', + 'SDQS2#', + 'SDQS3', + 'SDQS3#', + 'SDQM0', + 'SDQM1', + 'SDQM2', + 'SDQM3', + 'SCK#', + 'SCK', + 'SCKE0', + 'SCKE1', + 'SA0', + 'SA1', + 'SA2', + 'SA3', + 'SA4', + 'SA5', + 'SA6', + 'SA7', + 'SA8', + 'SA9', + 'SA10', + 'SA11', + 'SA12', + 'SA13', + 'SA14', + 'SBA0', + 'SBA1', + 'SBA2', + 'SWE', + 'SCAS', + 'SRAS', + 'SCS0', + 'SCS1', + 'SZQ', + 'SRST', + 'SDBG0', + 'SDBG1', + 'ADBG', + 'ODT0', + 'ODT1'], + 'CTRL_SYS': [ + 'TEST', + 'JTAG_SEL', + 'UBOOT_SEL', + 'NMI#', + 'RESET#', + 'CLK24M_IN', + 'CLK24M_OUT', + 'PLLTEST', + 'PLLREGIO', + 'PLLVP25', + 'PLLDV', + 'PLLVREG', + 'PLLGND', ], - - 'POWER_DRAM': - ['VCC0_DRAM', 'VCC1_DRAM', 'VCC2_DRAM', 'VCC3_DRAM', 'VCC4_DRAM', - 'VCC5_DRAM', 'VCC6_DRAM', 'VCC7_DRAM', 'VCC8_DRAM', 'VCC9_DRAM', - 'GND0_DRAM', 'GND1_DRAM', 'GND2_DRAM', 'GND3_DRAM', 'GND4_DRAM', - 'GND5_DRAM', 'GND6_DRAM', 'GND7_DRAM', 'GND8_DRAM', 'GND9_DRAM', - ], - - 'POWER_CPU': - ['VDD0_CPU', 'VDD1_CPU', 'VDD2_CPU', 'VDD3_CPU', 'VDD4_CPU', 'VDD5_CPU', - 'GND0_CPU', 'GND1_CPU', 'GND2_CPU', 'GND3_CPU', 'GND4_CPU', 'GND5_CPU', - ], - - 'POWER_DLL': - ['VDD0_DLL', 'VDD1_DLL', 'VDD2_DLL', - 'GND0_DLL', 'GND1_DLL', 'GND2_DLL', - ], - - 'POWER_INT': - ['VDD0_INT', 'VDD1_INT', 'VDD2_INT', 'VDD3_INT', 'VDD4_INT', - 'VDD5_INT', 'VDD6_INT', 'VDD7_INT', 'VDD8_INT', 'VDD9_INT', - 'GND0_INT', 'GND1_INT', 'GND2_INT', 'GND3_INT', 'GND4_INT', - 'GND5_INT', 'GND6_INT', 'GND7_INT', 'GND8_INT', 'GND9_INT', - ], - - 'POWER_GPIO': - ['VDD_GPIOA', 'VDD_GPIOB', 'VDD_GPIOC', - 'VDD_GPIOD', 'VDD_GPIOE', 'VDD_GPIOF', - 'VDD_GPIOG', - 'GND_GPIOA', 'GND_GPIOB', 'GND_GPIOC', - 'GND_GPIOD', 'GND_GPIOE', 'GND_GPIOF', - 'GND_GPIOG', - ] - - } + 'POWER_DRAM': [ + 'VCC0_DRAM', + 'VCC1_DRAM', + 'VCC2_DRAM', + 'VCC3_DRAM', + 'VCC4_DRAM', + 'VCC5_DRAM', + 'VCC6_DRAM', + 'VCC7_DRAM', + 'VCC8_DRAM', + 'VCC9_DRAM', + 'GND0_DRAM', + 'GND1_DRAM', + 'GND2_DRAM', + 'GND3_DRAM', + 'GND4_DRAM', + 'GND5_DRAM', + 'GND6_DRAM', + 'GND7_DRAM', + 'GND8_DRAM', + 'GND9_DRAM', + ], + 'POWER_CPU': [ + 'VDD0_CPU', + 'VDD1_CPU', + 'VDD2_CPU', + 'VDD3_CPU', + 'VDD4_CPU', + 'VDD5_CPU', + 'GND0_CPU', + 'GND1_CPU', + 'GND2_CPU', + 'GND3_CPU', + 'GND4_CPU', + 'GND5_CPU', + ], + 'POWER_DLL': [ + 'VDD0_DLL', + 'VDD1_DLL', + 'VDD2_DLL', + 'GND0_DLL', + 'GND1_DLL', + 'GND2_DLL', + ], + 'POWER_INT': [ + 'VDD0_INT', + 'VDD1_INT', + 'VDD2_INT', + 'VDD3_INT', + 'VDD4_INT', + 'VDD5_INT', + 'VDD6_INT', + 'VDD7_INT', + 'VDD8_INT', + 'VDD9_INT', + 'GND0_INT', + 'GND1_INT', + 'GND2_INT', + 'GND3_INT', + 'GND4_INT', + 'GND5_INT', + 'GND6_INT', + 'GND7_INT', + 'GND8_INT', + 'GND9_INT', + ], + 'POWER_GPIO': [ + 'VDD_GPIOA', + 'VDD_GPIOB', + 'VDD_GPIOC', + 'VDD_GPIOD', + 'VDD_GPIOE', + 'VDD_GPIOF', + 'VDD_GPIOG', + 'GND_GPIOA', + 'GND_GPIOB', + 'GND_GPIOC', + 'GND_GPIOD', + 'GND_GPIOE', + 'GND_GPIOF', + 'GND_GPIOG', + ]} fixedpins = display_fixed(fixedpins, len(pinouts)) @@ -432,33 +548,33 @@ def pinspec(): ] descriptions = { 'D1:FB/17': 'FlexBus. Connect to DM9000 or AX99896A MCU-style Bus\n' - '10/100 Ethernet PHY.', + '10/100 Ethernet PHY.', 'E1:FB/8': 'FlexBus bus bits 8-15, needed to make a 16-bit bus width', - 'B1:LCD/22': - 'RGB/TTL LCD, use SN75LVDS83b for LVDS or SSD2828 for MIPI,\n' + 'B1:LCD/22': 'RGB/TTL LCD, use SN75LVDS83b for ' + 'LVDS or SSD2828 for MIPI,\n' 'or a Chrontel CH7039, CH7038, CH7034 or CH7018 for dual\n' 'display output (eDP/LVDS and HDMI/VGA) ' 'conversion.', 'MMC': 'eMMC: main internal storage', 'ULPI1/8': 'USB-OTG, connect to ULPI OTG PHY (for charging)\n' - 'as well as USB Host or USB Device', + 'as well as USB Host or USB Device', 'ULPI2/8': 'USB2 Host, connect to ULPI PHY w/and 4-port USB2 Hub\n' - 'for example GL850G or FE1.1. ' - 'Connects to USB-Camera (VC0345 and 3x external USB Ports)', + 'for example GL850G or FE1.1. ' + 'Connects to USB-Camera (VC0345 and 3x external USB Ports)', 'SD1': 'internal, multiplexed with JTAG1\n' - 'and UART2, for debug purposes', + 'and UART2, for debug purposes', 'F1:IIS': 'I2C Audio, connect to AC97 Audio IC', 'TWI2': 'Connect to AC97 Audio IC', 'E2:UART1': 'Connect to BT on AP6234/AP6335', 'E2:SD3': 'Connect to WIFI on AP6234/AP6335', 'QSPI': 'Boot Storage (connection to companion / debug / boot MCU)\n' - 'Only actually needs MISO/MOSI, bootstrap loader v. small\n' - 'Bootstrap loader checks eMMC, USB-OTG, SD/MMC, SPI, etc.\n' - 'MCU implements keyboard-matrix for keyboard (also trackpad?)', + 'Only actually needs MISO/MOSI, bootstrap loader v. small\n' + 'Bootstrap loader checks eMMC, USB-OTG, SD/MMC, SPI, etc.\n' + 'MCU implements keyboard-matrix for keyboard (also trackpad?)', 'D2:TWI3': 'Connect to PMIC', 'GPIO': 'Plenty of spare GPIO pins for miscellaneous functions\n' - 'MCU EINT-capable GPIO may be used to generate extra EINTs\n' - 'on the single MCU_INT line, if really needed', + 'MCU EINT-capable GPIO may be used to generate extra EINTs\n' + 'on the single MCU_INT line, if really needed', 'F2:PWM_0': 'LCD Backlight', 'EINT_20': 'BT_HOST_WAKE', 'EINT_21': 'WIFI_HOST_WAKE',