From c1bf184703c69c8b084b3f7c8c0e3de5a5c77bf8 Mon Sep 17 00:00:00 2001 From: Neel Date: Tue, 13 Mar 2018 16:43:11 +0530 Subject: [PATCH] maintaining distinct arrays for muxed and dedicated cells This allows better structure of code and also handling muxed logic is decoupled from the dedicated pins. Cell mux methods only for muxed IOs is created. Parsing of pinmap file now happens in params.py see #1 --- pinmap.txt | 14 ++--- src/actual_pinmux.py | 115 +++++++++++++++++----------------------- src/interface_decl.py | 2 +- src/interface_def.py | 2 +- src/params.py | 21 +++++++- src/pinmux_generator.py | 15 +++--- src/wire_def.py | 2 +- 7 files changed, 88 insertions(+), 83 deletions(-) diff --git a/pinmap.txt b/pinmap.txt index 08fc607..71d0963 100644 --- a/pinmap.txt +++ b/pinmap.txt @@ -1,8 +1,10 @@ muxed -0 uart0_tx spi0_sclk -1 uart0_rx spi0_mosi -2 twi0_sda spi0_ss -3 twi0_scl spi0_miso +0 uart0_tx spi0_sclk +1 uart0_rx spi0_mosi +2 twi0_sda spi0_ss +3 twi0_scl spi0_miso dedicated -4 uart1_tx -5 uart1_rx +4 uart1_tx +5 uart1_rx +6 twi1_sda +7 twi1_scl diff --git a/src/actual_pinmux.py b/src/actual_pinmux.py index bedd567..37c8cdf 100644 --- a/src/actual_pinmux.py +++ b/src/actual_pinmux.py @@ -8,7 +8,7 @@ dictionary = { "uart_tx" : "output", "spi_sclk" : "output", "spi_mosi" : "output", - "spi_ss" : "output", + "spi_ss" : "output", "spi_miso" : "input", "twi_sda" : "inout", "twi_scl" : "inout" @@ -31,76 +31,57 @@ dedicated_wire = ''' ''' # ============================================================ pinmux = ''' ''' -pinmap_file = open("./pinmap.txt", "r") -dedicated = False -for lineno, line in enumerate(pinmap_file): - line1 = line.split() - if("muxed" in line): - dedicated = False - elif("dedicated" in line): - dedicated = True - digits = str.maketrans(dict.fromkeys('0123456789')) - # ==== Logic for muxed pins ==== # - if(len(line1) > 1 and not(dedicated)): - if(lineno > N_IO): - print( - "ERROR: Parameter N_IO(" + - str(N_IO) + - ") is less than the pin number in line: " + - str(lineno) + - " of pinmap.txt") - exit(1) - # ==== Mux each generic IO cell with the mapping ===== # - # provided in the pinmap file - pinmux = pinmux + " cell" + str(line1[0]) + "_out=" - i = 0 - while(i < len(line1) - 1): - pinmux = pinmux + "wrmux" + \ - str(line1[0]) + "==" + str(i) + "?" + line1[i + 1] + "_io:" - if(i + 2 == len(line1) - 1): - pinmux = pinmux + line1[i + 2] + "_io" - i = i + 2 - else: - i = i + 1 - pinmux = pinmux + ";\n" - # ======================================================== # +digits = str.maketrans(dict.fromkeys('0123456789')) - # check each cell if "peripheral input/inout" then assign its wire - # Here we check the direction of each signal in the dictionary. - # We choose to keep the dictionary within the code and not user-input - # since the interfaces are always standard and cannot change from - # user-to-user. Plus this also reduces human-error as well :) - for i in range(0, len(line1) - 1): - temp = line1[i + 1].translate(digits) - x = dictionary.get(temp) - if(x is None): - print( - "Error: The signal : " + - str(line1[i + 1]) + - " in lineno: " + - str(lineno) + "of pinmap.txt isn't present in the \ - current dictionary.\nUpdate dictionary or fix-typo.") - exit(1) - if(x == "input"): - pinmux = pinmux + \ - mux_wire.format(line1[0], i, "wr" + line1[i + 1]) + "\n" - elif(x == "inout"): - pinmux = pinmux + \ - mux_wire.format(line1[0], i, "wr" + line1[i + 1] + - "_in") + "\n" - # ============================================================ # +for cell in muxed_cells: + pinmux = pinmux + " cell" + str(cell[0]) + "_out=" + i = 0 + while(i < len(cell) - 1): + pinmux = pinmux + "wrmux" + \ + str(cell[0]) + "==" + str(i) + "?" + cell[i + 1] + "_io:" + if(i + 2 == len(cell) - 1): + pinmux = pinmux + cell[i + 2] + "_io" + i = i + 2 + else: + i = i + 1 + pinmux = pinmux + ";\n" + # ======================================================== # - # ================== Logic for dedicated pins ========= # - elif(len(line1) > 1 and dedicated): - pinmux = pinmux + " cell" + \ - str(line1[0]) + "_out=" + line1[1] + "_io;\n" - temp = line1[1].translate(digits) + # check each cell if "peripheral input/inout" then assign its wire + # Here we check the direction of each signal in the dictionary. + # We choose to keep the dictionary within the code and not user-input + # since the interfaces are always standard and cannot change from + # user-to-user. Plus this also reduces human-error as well :) + for i in range(0, len(cell) - 1): + temp = cell[i + 1].translate(digits) x = dictionary.get(temp) + if(x is None): + print( + "Error: The signal : " + + str(cell[i + 1]) + + " in lineno: " + + str(lineno) + "of pinmap.txt isn't present in the \ + current dictionary.\nUpdate dictionary or fix-typo.") + exit(1) if(x == "input"): pinmux = pinmux + \ - dedicated_wire.format(line1[0], "wr" + line1[1]) + "\n" + mux_wire.format(cell[0], i, "wr" + cell[i + 1]) + "\n" elif(x == "inout"): pinmux = pinmux + \ - dedicated_wire.format(line1[0], "wr" + line1[1] + "_in") + "\n" - # ======================================================= # -# ========================================================= + mux_wire.format(cell[0], i, "wr" + cell[i + 1] + + "_in") + "\n" +# ============================================================ # + +# ================== Logic for dedicated pins ========= # +for cell in dedicated_cells: + pinmux = pinmux + " cell" + \ + str(cell[0]) + "_out=" + cell[1] + "_io;\n" + temp = cell[1].translate(digits) + x = dictionary.get(temp) + if(x == "input"): + pinmux = pinmux + \ + dedicated_wire.format(cell[0], "wr" + cell[1]) + "\n" + elif(x == "inout"): + pinmux = pinmux + \ + dedicated_wire.format(cell[0], "wr" + cell[1] + "_in") + "\n" +# =======================================================# diff --git a/src/interface_decl.py b/src/interface_decl.py index b94250b..145eeaf 100644 --- a/src/interface_decl.py +++ b/src/interface_decl.py @@ -2,7 +2,7 @@ from params import * # ========= Interface declarations ================ # mux_interface = ''' - method Action cell{0}_mux(Bit#(''' + str(N_MUX) + ''') in);''' + method Action cell{0}_mux(Bit#({1}) in);''' io_interface = ''' (*always_ready*) method Bit#(1) io_outputval_{0}; diff --git a/src/interface_def.py b/src/interface_def.py index 0d2305d..12fa6c9 100644 --- a/src/interface_def.py +++ b/src/interface_def.py @@ -1,7 +1,7 @@ from params import * # === templates for interface definitions ====== # mux_interface_def = ''' - method Action cell{0}_mux (Bit#(''' + str(N_MUX) + ''') in ); + method Action cell{0}_mux (Bit#({1}) in ); wrmux{0}<=in; endmethod ''' diff --git a/src/params.py b/src/params.py index bba7fad..cad4449 100644 --- a/src/params.py +++ b/src/params.py @@ -1,7 +1,26 @@ # == Parameters == # N_MUX = 1 # number of selection lines for the mux per io -N_IO = 8 +N_IO = 0 +N_MUX_IO = 0 N_UART = 2 N_SPI = 1 N_TWI = 2 # ================ # +# == capture the number of IO cells required == # +pinmapfile = open('pinmap.txt', 'r') +max_io = 0 +muxed_cells = [] +dedicated_cells = [] +for lineno, line in enumerate(pinmapfile): + line1 = line.split() + if(len(line1) > 1): + if(len(line1) == 2): # dedicated + dedicated_cells.append(line1) + if(len(line1) > 2): + muxed_cells.append(line1) + +N_IO = len(dedicated_cells) + len(muxed_cells) +print("Max number of IO: " + str(N_IO)) +print("Muxed IOs: " + str(len(muxed_cells))) +print("Dedicated IOs: " + str(len(dedicated_cells))) +# ============================================ # diff --git a/src/pinmux_generator.py b/src/pinmux_generator.py index dbea8d5..0de361f 100644 --- a/src/pinmux_generator.py +++ b/src/pinmux_generator.py @@ -31,6 +31,8 @@ if not os.path.exists("bsv_src"): os.makedirs("bsv_src") bsv_file = open("./bsv_src/pinmux.bsv", "w") + + header = ''' /* This BSV file has been generated by the PinMux tool available at: @@ -72,8 +74,8 @@ bsv_file.write(''' // of muxes happening per IO. For now we have a generalized width // where each IO will have the same number of muxes.''') -for i in range(0, N_IO): - bsv_file.write(mux_interface.format(i)) +for cell in muxed_cells: + bsv_file.write(mux_interface.format(cell[0], len(cell) - 1)) bsv_file.write(''' @@ -115,8 +117,8 @@ bsv_file.write(''' // the followins wires capture the pin-mux selection // values for each mux assigned to a CELL ''') -for i in range(0, N_IO): - bsv_file.write(muxwire.format(i)) +for cell in muxed_cells: + bsv_file.write(muxwire.format(cell[0], len(cell) - 1)) bsv_file.write( @@ -153,8 +155,8 @@ bsv_file.write(''' ''') # ==================================================================== # ================= interface definitions for each method =============# -for i in range(0, N_IO): - bsv_file.write(mux_interface_def.format(i)) +for cell in muxed_cells: + bsv_file.write(mux_interface_def.format(cell[0], len(cell) - 1)) for i in range(0, N_IO): bsv_file.write(io_interface_def.format(i)) for i in range(0, N_UART): @@ -166,3 +168,4 @@ for i in range(0, N_TWI): bsv_file.write(footer) print("BSV file successfully generated: bsv_src/pinmux.bsv") # ====================================================================== +bsv_file.close() diff --git a/src/wire_def.py b/src/wire_def.py index 011e159..0cd9cb2 100644 --- a/src/wire_def.py +++ b/src/wire_def.py @@ -1,7 +1,7 @@ from params import * # == Intermediate wire definitions ==# muxwire = ''' - Wire#(Bit#(''' + str(N_MUX) + ''')) wrmux{0} <-mkDWire(0);''' + Wire#(Bit#({1})) wrmux{0} <-mkDWire(0);''' generic_io = ''' GenericIOType cell{0}_out=unpack(0); Wire#(Bit#(1)) cell{0}_in <-mkDWire(0); -- 2.30.2