riscv_subproject_deps = \
	softfloat_riscv \
	softfloat \

riscv_install_prog_srcs = \
	spike.cc \

riscv_hdrs = \
	htif.h \
	common.h \
	decode.h \
	mmu.h \
	processor.h \
	sim.h \
	trap.h \
	opcodes.h \
	insn_header.h \
	cachesim.h \
	memtracer.h \

riscv_srcs = \
	htif.cc \
	processor.cc \
	sim.cc \
	interactive.cc \
	trap.cc \
	cachesim.cc \
	mmu.cc \
	disasm.cc \
	$(DISPATCH_SRCS) \

riscv_test_srcs =

riscv_gen_hdrs = \
	dispatch.h \

NDISPATCH = 9
DISPATCH_SRCS = $(addsuffix .cc,$(addprefix dispatch,$(call range,0,$(NDISPATCH))))

$(DISPATCH_SRCS): %.cc: dispatch $(wildcard insns/*.h) opcodes.h
	$< $(subst dispatch,,$(subst .cc,,$@)) $(NDISPATCH) 1024 < $(src_dir)/riscv/opcodes.h > $@

dispatch.h: %.h: dispatch opcodes.h
	echo $(riscv_srcs)
	$< $(NDISPATCH) 1024 < $(src_dir)/riscv/opcodes.h > $@

riscv_junk = \
  dispatch.h \
  $(DISPATCH_SRCS) \