X-Git-Url: https://git.libre-soc.org/?p=riscv-isa-sim.git;a=blobdiff_plain;f=riscv%2Finsns%2Fc_slli.h;h=19d7908dc5b5f8659a44353d41ec88edeb714a45;hp=24fbb1335be3060dd7b9b1d2c2dd96a1585608ba;hb=be0555d585b332fd0496affe559c0a5a4e7e5644;hpb=7e35a2a62f7433060e2ab1c98b3afd8b8a69b829

diff --git a/riscv/insns/c_slli.h b/riscv/insns/c_slli.h
index 24fbb13..19d7908 100644
--- a/riscv/insns/c_slli.h
+++ b/riscv/insns/c_slli.h
@@ -1,3 +1,3 @@
 require_extension('C');
-require(insn.rvc_zimm() < xlen);
+require(insn.rvc_zimm() < xlen && insn.rvc_zimm() > 0);
 WRITE_RD(sext_xlen(RVC_RS1 << insn.rvc_zimm()));