From: Tim Newsome <tim@sifive.com>
Date: Tue, 12 Sep 2017 20:53:17 +0000 (-0700)
Subject: Merge pull request #123 from riscv/debug_interrupts
X-Git-Url: https://git.libre-soc.org/?p=riscv-isa-sim.git;a=commitdiff_plain;h=8969a855132a27769dd6399566dc86ac32b26e76

Merge pull request #123 from riscv/debug_interrupts

Don't take interrupts while in Debug Mode.
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8969a855132a27769dd6399566dc86ac32b26e76