From 7e35a2a62f7433060e2ab1c98b3afd8b8a69b829 Mon Sep 17 00:00:00 2001 From: Prashanth Mundkur Date: Wed, 14 Mar 2018 09:48:11 -0700 Subject: [PATCH] Fix a bug caused by moving misa into state_t. (#180) * Fix misa losing its value in processor constructor due to state:reset() following state.misa initialization. Make state:reset() preserve misa. * Set state.misa to max_isa on reset(). * Idiomatic fix for earlier commit. --- riscv/processor.cc | 5 +++-- riscv/processor.h | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/riscv/processor.cc b/riscv/processor.cc index 2500c2b..35adc10 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -115,9 +115,10 @@ void processor_t::parse_isa_string(const char* str) max_isa = state.misa; } -void state_t::reset() +void state_t::reset(reg_t max_isa) { memset(this, 0, sizeof(*this)); + misa = max_isa; prv = PRV_M; pc = DEFAULT_RSTVEC; load_reservation = -1; @@ -146,7 +147,7 @@ void processor_t::set_histogram(bool value) void processor_t::reset() { - state.reset(); + state.reset(max_isa); state.dcsr.halt = halt_on_reset; halt_on_reset = false; set_csr(CSR_MSTATUS, state.mstatus); diff --git a/riscv/processor.h b/riscv/processor.h index 7d504d9..ace86f9 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -86,7 +86,7 @@ typedef struct // architectural state of a RISC-V hart struct state_t { - void reset(); + void reset(reg_t max_isa); static const int num_triggers = 4; -- 2.30.2