descriptionSimple-V augmented version of spike
ownergit repository hosting
last changeThu, 13 Sep 2018 06:56:49 +0000 (23:56 -0700)
shortlog
2018-09-13 Andrew WatermanUpdate README master
2018-09-06 Tim NewsomeMerge pull request #235 from riscv/sba
2018-09-05 Tim NewsomeFix cut-and-paste bug in 64-bit SBA loads.
2018-08-24 Andrew WatermanHandle spike-dasm inputs with leading 0x correctly
2018-08-24 Tim NewsomeAdd dummy custom debug registers, to test OpenOCD....
2018-08-24 Andrew WatermanFix several disassembler bugs
2018-08-23 Andrew WatermanAdd --disable-dtb option to suppress writing the DTB...
2018-08-22 Andrew WatermanMake IRQ_COP read-only/undelegable unless coprocessor...
2018-08-21 Andrew WatermanInstantiate disassembler after max_xlen is known
2018-08-18 Andrew WatermanDon't increment instret immediately after it is written...
2018-08-10 Tim NewsomeFix 2 trigger corner cases. (#229)
2018-07-31 Andrew WatermanMake sstatus.MXR readable
2018-07-23 SeungRyeol LeeFix using the uninitialized disassemble object. (#220)
2018-07-10 Andrew WatermanRefactor and fix LR/SC implementation (#217)
2018-06-12 Tim NewsomeMerge pull request #212 from riscv/hartsel
2018-06-11 Tim NewsomeUpdate debug_defines.h
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heads
4 months ago sv
14 months ago master