debug: Don't halt out of reset. It's unrealistic. Use a program which loops (actually...

[riscv-tests.git] / debug / targets.py

diff --git a/debug/targets.py b/debug/targets.py
index d49b3970670598768fe7cac5dd56bbae79dd7b4f..a69f43d91463924ccee841d7f9aaaac640710a7b 100644 (file)
--- a/debug/targets.py
+++ b/debug/targets.py
@@ -76,14 +76,14 @@ class Spike64Target(SpikeTarget):
     use_fpu = True
 
     def target(self):
-        return testlib.Spike(self.sim_cmd, halted=True)
+        return testlib.Spike(self.sim_cmd)
 
 class Spike32Target(SpikeTarget):
     name = "spike32"
     xlen = 32
 
     def target(self):
-        return testlib.Spike(self.sim_cmd, halted=True, xlen=32)
+        return testlib.Spike(self.sim_cmd, xlen=32)
 
 class FreedomE300Target(Target):
     name = "freedom-e300"