Merge remote-tracking branch 'origin/newprogram' into debug-0.13

[riscv-tests.git] / debug / targets.py

diff --git a/debug/targets.py b/debug/targets.py
index 5ac62a83de518f934f89aca4ef7733d38ad53861..f2728d1aed30db7ff7cdecf1f100e026f06d1577 100644 (file)
--- a/debug/targets.py
+++ b/debug/targets.py
@@ -100,7 +100,7 @@ class HiFive1Target(FreedomE300Target):
 class FreedomE300SimTarget(Target):
     name = "freedom-e300-sim"
     xlen = 32
-    timeout_sec = 240
+    timeout_sec = 6000
     ram = 0x80000000
     ram_size = 256 * 1024 * 1024
     instruction_hardware_breakpoint_count = 2
@@ -120,7 +120,7 @@ class FreedomU500Target(Target):
 class FreedomU500SimTarget(Target):
     name = "freedom-u500-sim"
     xlen = 64
-    timeout_sec = 240
+    timeout_sec = 6000
     ram = 0x80000000
     ram_size = 256 * 1024 * 1024
     instruction_hardware_breakpoint_count = 2