debug: working with newprogram branch
[riscv-tests.git] / debug / targets / freedom-u500-sim / openocd.cfg
index 0b808858a410a53f876d02fec4a5fc42c52e42e2..9239c83ddde91c20de939040bee122b3ab03292a 100644 (file)
@@ -2,13 +2,15 @@ adapter_khz     10000
 
 source [find interface/jtag_vpi.cfg]
 jtag_vpi_set_port $::env(JTAG_VPI_PORT)
+#jtag_vpi_set_port 44005
 
 set _CHIPNAME riscv
 jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME -rtos riscv
 
 init
 
 halt
+echo "OK GO NOW"