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Reflect changes to ISA
[riscv-tests.git] / isa / rv64uv / vfmvv.S
diff --git a/isa/rv64uv/vfmvv.S b/isa/rv64uv/vfmvv.S
index 869160bb5cdfdb8f339a90e205ee4988f8669ed8..2f6e8bf084a426b5f784270aa272fd74aa1e26ff 100644 (file)
--- a/isa/rv64uv/vfmvv.S
+++ b/isa/rv64uv/vfmvv.S
@@ -34,7 +34,7 @@ loop:
 vtcode:
   utidx x1
   addi x1,x1,1
-  mxtf.d f0,x1
+  fmv.d.x f0,x1
   stop
 
   TEST_PASSFAIL