X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=blobdiff_plain;f=debug%2Ftargets%2FRISC-V%2Fspike32-2.py;h=6c90b7c87f808d9b2a229072417365e3a67357b1;hp=89d3c2a3602bbc59bd96f92bdeda052df81d167d;hb=4dddbc79ada7f0a836cf538676c57c8df103ccf6;hpb=40dbc5118c9ac4beb4fc0a28cf4ad4cb56536111

diff --git a/debug/targets/RISC-V/spike32-2.py b/debug/targets/RISC-V/spike32-2.py
index 89d3c2a..6c90b7c 100644
--- a/debug/targets/RISC-V/spike32-2.py
+++ b/debug/targets/RISC-V/spike32-2.py
@@ -7,6 +7,7 @@ class spike32_2(targets.Target):
     harts = [spike32.spike32_hart(), spike32.spike32_hart()]
     openocd_config_path = "spike-2.cfg"
     timeout_sec = 30
+    implements_custom_test = True
 
     def create(self):
         return testlib.Spike(self, isa="RV32IMAFC", progbufsize=0)