add invert/zeroing addu subvl predicate test sv
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 27 Jun 2019 12:59:34 +0000 (13:59 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 27 Jun 2019 12:59:34 +0000 (13:59 +0100)
commit1a77df3e377db9675c8633fee70e2207f71d99be
tree1851b3bda60d06efe8d151012fe31fab925c2e0a
parentc590c61cc62c23fa239c9bf6d8e10b824e1a6a9f
add invert/zeroing addu subvl predicate test
isa/rv64ui/sv_addi_predicated_subvl.S