From: Srivatsa Yogendra <36861801+srivatsa611y@users.noreply.github.com>
Date: Sat, 18 Aug 2018 01:49:16 +0000 (-0700)
Subject: Fix to solve the failing tests shamt, csr and scall (#151)
X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=commitdiff_plain;h=31a91823b7c7becacd06c9c32e44180eea5e4fe7

Fix to solve the failing tests shamt, csr and scall (#151)

* making mtvec_handler global

* Adding the pmp configuration inst

The PMP config instructions are added as the test jumps to user mode

* Adding pmp config inst

Adding pmp config instructions as the test jumps to user mode

* changing to PMP macros

* changing to PMP Macros

* moving the #endif after pmp initialization

* Removing the unwanted label
---

diff --git a/isa/rv64si/csr.S b/isa/rv64si/csr.S
index dbe1c05..e3ea0cd 100644
--- a/isa/rv64si/csr.S
+++ b/isa/rv64si/csr.S
@@ -80,6 +80,20 @@ RVTEST_CODE_BEGIN
   srli a0, a0, 20 # a0 = a0 >> 20
   andi a0, a0, 1  # a0 = a0 & 1
   beqz a0, finish # if no user mode, skip the rest of these checks
+  la t0, user_mode_end
+  srli t0, t0, PMP_SHIFT
+  csrr t1, pmpcfg0
+  csrw pmpaddr0, t0
+  csrr t1, pmpaddr0
+  bne t0, t1, fail
+  li t0, (PMP_R | PMP_W | PMP_X)   # giving read, write and execute permissions
+  or t0, t0, PMP_TOR  # setting mode to TOR
+  li t1, 255
+  csrrc t1, pmpcfg0, t1
+  csrrs t1, pmpcfg0, t0
+  csrr  t1, pmpcfg0
+  andi  t1, t1, 255
+  bne t0, t1, fail
 #endif /* __MACHINE_MODE */
 
   # jump to user land
@@ -103,10 +117,15 @@ RVTEST_CODE_BEGIN
 #else
   TEST_CASE(12, x0, 0, nop)
 #endif
-
+  scall
 finish:
   RVTEST_PASS
 
+  .align 2
+  .global user_mode_end
+user_mode_end:
+  nop
+  
   # We should only fall through to this if scall failed.
   TEST_PASSFAIL
 
diff --git a/isa/rv64si/scall.S b/isa/rv64si/scall.S
index 0579806..aea49b0 100644
--- a/isa/rv64si/scall.S
+++ b/isa/rv64si/scall.S
@@ -6,6 +6,8 @@
 #
 # Test syscall trap.
 #
+# If the pmp registers are implemented, then the pmp registers have 
+# to be configured before jumping to the privilaged modes
 
 #include "riscv_test.h"
 #include "test_macros.h"
@@ -26,16 +28,33 @@ RVTEST_CODE_BEGIN
 
   li TESTNUM, 2
 
-  # This is the expected trap code.
-  li t1, CAUSE_USER_ECALL
-
 #ifdef __MACHINE_MODE
   # If running in M mode, use mstatus.MPP to check existence of U mode.
   # Otherwise, if in S mode, then U mode must exist and we don't need to check.
+
+  la t0, user_mode_end
+  srli t0, t0, PMP_SHIFT
+  csrr t1, pmpcfg0
+  csrw pmpaddr0, t0
+  csrr t1, pmpaddr0
+  bne t0, t1, fail
+  li t0, (PMP_R | PMP_W | PMP_X)   # giving read, write and execute permissions
+  or t0, t0, PMP_TOR  # setting mode to TOR
+  li t1, 255
+  csrrc t1, pmpcfg0, t1
+  csrrs t1, pmpcfg0, t0
+  csrr  t1, pmpcfg0
+  andi  t1, t1, 255
+  bne t0, t1, fail
+.global no_pmp_implemented
+no_pmp_implemented:
   li t0, MSTATUS_MPP
   csrc mstatus, t0
   csrr t1, mstatus
   and t0, t0, t1
+  
+# This is the expected trap code.
+  li t1, CAUSE_USER_ECALL
   beqz t0, 1f
 
   # If U mode doesn't exist, mcause should indicate ECALL from M mode.
@@ -55,18 +74,27 @@ do_scall:
   scall
   j fail
 
+  .align 2
+  .global user_mode_end
+user_mode_end:
+  nop
+
   TEST_PASSFAIL
 
   .align 2
   .global stvec_handler
 stvec_handler:
   csrr t0, scause
-  bne t0, t1, fail
+  bne t0, t1, check_for_pmp
   la t2, do_scall
   csrr t0, sepc
   bne t0, t2, fail
   j pass
 
+check_for_pmp: 
+  li t1, CAUSE_ILLEGAL_INSTRUCTION
+  bne t0, t1, fail
+  j no_pmp_implemented
 RVTEST_CODE_END
 
   .data