From: Luke Kenneth Casson Leighton Date: Fri, 26 Oct 2018 06:57:59 +0000 (+0100) Subject: correct addw elwidth test X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=commitdiff_plain;h=6e0f3eb2d7a6e1086c13bbcd230e425c64ab6efe correct addw elwidth test --- diff --git a/isa/rv64ui/sv_addw_elwidth.S b/isa/rv64ui/sv_addw_elwidth.S index 0bfcfd0..304ca6e 100644 --- a/isa/rv64ui/sv_addw_elwidth.S +++ b/isa/rv64ui/sv_addw_elwidth.S @@ -44,8 +44,8 @@ RVTEST_CODE_BEGIN # Start of test code. SV_ELWIDTH_TEST( 0, 0, 3, 0x886848288b6bab8b, 0x0000000000000000 ) SV_ELWIDTH_TEST( 1, 1, 0, 0xffffffffffffff8b, 0xffffffffffffffab ) SV_ELWIDTH_TEST( 1, 1, 3, 0xffffffabffffff8b, 0x0000000000000000 ) - SV_ELWIDTH_TEST( 1, 1, 2, 0xffffffffffabff8b, 0x0000000000000000 ) - SV_ELWIDTH_TEST( 1, 1, 1, 0xffffffffffffab8b, 0x0000000000000000 ) + SV_ELWIDTH_TEST( 1, 1, 2, 0x00000000ffabff8b, 0x0000000000000000 ) + SV_ELWIDTH_TEST( 1, 1, 1, 0x000000000000ab8b, 0x0000000000000000 ) RVTEST_PASS # Signal success. fail: