From: Megan Wachs <megan@sifive.com>
Date: Tue, 16 May 2017 17:01:30 +0000 (-0700)
Subject: debug: Update OpenOCD configs.
X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=commitdiff_plain;h=8dc1490a5a86549a89cc8276477a158da68840b5

debug: Update OpenOCD configs.
---

diff --git a/debug/targets/freedom-e300-sim/openocd.cfg b/debug/targets/freedom-e300-sim/openocd.cfg
index fcb8451..5733f27 100644
--- a/debug/targets/freedom-e300-sim/openocd.cfg
+++ b/debug/targets/freedom-e300-sim/openocd.cfg
@@ -12,4 +12,4 @@ target create $_TARGETNAME riscv -chain-position $_TARGETNAME -rtos riscv
 
 init
 halt
-echo "OK GO NOW"
+echo "Ready for Remote Connections"
diff --git a/debug/targets/freedom-u500-sim/openocd.cfg b/debug/targets/freedom-u500-sim/openocd.cfg
index 0ce11d8..5fba211 100644
--- a/debug/targets/freedom-u500-sim/openocd.cfg
+++ b/debug/targets/freedom-u500-sim/openocd.cfg
@@ -1,11 +1,10 @@
 adapter_khz     10000
 
 source [find interface/jtag_vpi.cfg]
-#jtag_vpi_set_port $::env(JTAG_VPI_PORT)
-jtag_vpi_set_port 46401
+jtag_vpi_set_port $::env(JTAG_VPI_PORT)
 
 set _CHIPNAME riscv
-jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
+jtag newtap $_CHIPNAME cpu -irlen 5
 
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME riscv -chain-position $_TARGETNAME -rtos riscv
@@ -13,4 +12,4 @@ target create $_TARGETNAME riscv -chain-position $_TARGETNAME -rtos riscv
 init
 
 halt
-echo "OK GO NOW"
+echo "Ready for Remote Connections"