From: Tim Newsome <tim@sifive.com>
Date: Tue, 19 Sep 2017 18:23:35 +0000 (-0700)
Subject: Forgot to commit this earlier.
X-Git-Url: https://git.libre-soc.org/?p=riscv-tests.git;a=commitdiff_plain;h=e087d97b130ec0a04c8d3498a66503c1746dadd3

Forgot to commit this earlier.

Fixes #77.
---

diff --git a/debug/programs/init.h b/debug/programs/init.h
new file mode 100644
index 0000000..9aaa398
--- /dev/null
+++ b/debug/programs/init.h
@@ -0,0 +1,20 @@
+#ifndef INIT_H
+#define INIT_H
+
+#define MTIME           (*(volatile long long *)(0x02000000 + 0xbff8))
+#define MTIMECMP        ((volatile long long *)(0x02000000 + 0x4000))
+
+#define csr_read(csr)                                   \
+({                                                      \
+    register unsigned long __v;                         \
+    __asm__ __volatile__ ("csrr %0, " #csr              \
+                  : "=r" (__v));                        \
+    __v;                                                \
+})
+
+typedef void* (*trap_handler_t)(unsigned hartid, unsigned mcause, void *mepc,
+        void *sp);
+void set_trap_handler(trap_handler_t handler);
+void enable_timer_interrupts();
+
+#endif