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Merge pull request #141 from riscv/mrhstest
2018-05-21 Tim NewsomeMerge pull request #141 from riscv/mrhstest
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2018-05-15 Megan WachsMerge pull request #139 from riscv/debug-tests-more...
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2018-05-14 Megan Wachsdebug: remove some unintentionally added newlines
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2018-04-29 Megan WachsMerge pull request #132 from riscv/debug-clear-satp
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2018-04-27 Megan Wachsdebug: need to clear satp before changing priv
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2018-04-27 Megan WachsMerge pull request #125 from riscv/debug-delete-sim
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2018-04-27 Megan WachsMerge pull request #130 from riscv/trap_entry_align-1
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2018-04-27 Megan Wachsdebug: add missing align directive on trap_entry
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2018-04-19 Megan WachsDelete E300Sim.py
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2018-04-16 Tim NewsomeMerge pull request #123 from riscv/gdb_timeout
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2018-03-21 Palmer DabbeltMerge pull request #119 from rishikhan/master
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2018-02-27 Andrew WatermanAdd test for clearing misa.C while PC is misaligned...
See https://github.com/riscv/riscv-isa-manual/pull/139
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2018-01-03 Andrew WatermanTest access exception behavior for illegal addresses...
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2017-12-21 Megan WachsMerge pull request #110 from riscv/bump_env
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2017-11-30 Tim NewsomeMerge pull request #109 from riscv/vcssim
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2017-11-20 Andrew WatermanCheck mtval in rv64mi-p-illegal (#104)
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2017-11-17 Megan WachsMerge pull request #102 from riscv/xlen_fix
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2017-11-17 Megan WachsDebug: Use the --32 and --64 command line arguments...
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2017-11-12 Andrew WatermanMake sure that code is 4-byte aligned before disabling...
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2017-11-02 Megan Wachsdebug: Need to apply remotetimeout before connecting...
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2017-10-31 Palmer DabbeltMerge pull request #90 from richardxia/comment-out...
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2017-10-04 Tim NewsomeMerge pull request #79 from riscv/multigdb
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2017-09-19 Tim NewsomeMerge pull request #76 from riscv/multicore
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2017-09-12 Tim NewsomeMerge pull request #69 from riscv/multicore
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2017-08-16 Palmer DabbeltMerge pull request #67 from riscv/sfence_vma
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2017-08-14 Megan WachsMerge pull request #66 from riscv/debug_user_niceness
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2017-08-08 Palmer DabbeltMerge pull request #62 from richardxia/only-emit-f...
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2017-07-06 Tim NewsomeMerge pull request #58 from riscv/fpga_reset_halt
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2017-06-27 Tim NewsomeMerge pull request #55 from riscv/debug
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2017-06-27 Tim NewsomeMerge pull request #56 from riscv/config
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2017-05-25 Palmer DabbeltMerge pull request #53 from richardxia/fail-if-simulator...
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2017-05-18 Megan WachsMerge pull request #52 from riscv/vcs_sim_cmd
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2017-05-17 Palmer DabbeltMerge pull request #49 from riscv/no_examine_target
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2017-05-16 Megan Wachsdebug: remove unused auto_int function
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2017-05-16 Palmer DabbeltMerge pull request #47 from riscv/debug-0.13
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2017-05-16 Palmer DabbeltMerge pull request #48 from riscv/tests
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2016-12-13 Tim NewsomeMerge pull request #38 from richardxia/disable_tcl_and_telne...
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2016-11-11 Tim NewsomeMerge pull request #35 from richardxia/have-openocd...
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2016-10-19 Tim NewsomeMerge pull request #34 from richardxia/use-port-randomization
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2016-08-23 Tim NewsomeMerge pull request #24 from richardxia/declare-dependencies
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2016-08-12 Tim NewsomeMerge pull request #21 from sifive/add_freedom_sim_targets
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2016-07-25 Andrew WatermanMerge pull request #18 from sifive/master
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2016-07-20 Andrew WatermanMerge pull request #17 from timsifive/debug
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