From 7775ace53130bd7c76229a363f07eccf6269d136 Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 29 Nov 2018 00:25:17 +0000
Subject: [PATCH] add Makefile for verilog compilation

---
 Makefile | 6 ++++++
 1 file changed, 6 insertions(+)
 create mode 100644 Makefile

diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..85844f0
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,6 @@
+rv32_sim:
+	iverilog -o rv32 -Wall cpu.v cpu_alu.v cpu_fetch_stage.v \
+	                cpu_memory_interface.v vga*.v cpu_decoder.v \
+	block_memory.v block_memory_16kbit.v \
+	main.v main_test.v 
+
-- 
2.30.2