pinctrl: Create extendable Signal classes

[sifive-blocks.git] / src / main / scala / devices / gpio / GPIOPins.scala

diff --git a/src/main/scala/devices/gpio/GPIOPins.scala b/src/main/scala/devices/gpio/GPIOPins.scala
index de086bf9f5dbd94d83fbc672c26d1c33ad2ae082..e2f279eeacc6da9892fe81a99f6dbcd154b8c76a 100644 (file)
--- a/src/main/scala/devices/gpio/GPIOPins.scala
+++ b/src/main/scala/devices/gpio/GPIOPins.scala
@@ -9,18 +9,19 @@ import sifive.blocks.devices.pinctrl.{Pin}
 // even though it looks like something that more directly talks to
 // a pin. It also makes it possible to change the exact
 // type of pad this connects to.
-class GPIOPins[T <: Pin] (pingen: ()=> T,  c: GPIOParams) extends Bundle {
-
+class GPIOSignals[T <: Data] (pingen: ()=> T,  c: GPIOParams) extends Bundle {
   val pins = Vec(c.width, pingen())
+}
+
+class GPIOPins[T <: Pin] (pingen: ()=> T,  c: GPIOParams) extends GPIOSignals[T](pingen, c)
 
-  override def cloneType: this.type =
-    this.getClass.getConstructors.head.newInstance(pingen, c).asInstanceOf[this.type]
+object GPIOPinsFromPort {
 
-  def fromPort(port: GPIOPortIO){
+  def apply[T <: Pin](pins: GPIOSignals[T], port: GPIOPortIO){
 
     // This will just match up the components of the Bundle that
     // exist in both.
-    (pins zip port.pins) foreach {case (pin, port) =>
+    (pins.pins zip port.pins) foreach {case (pin, port) =>
       pin <> port
     }
   }