pinctrl: Create extendable Signal classes

[sifive-blocks.git] / src / main / scala / devices / i2c / I2CPins.scala

diff --git a/src/main/scala/devices/i2c/I2CPins.scala b/src/main/scala/devices/i2c/I2CPins.scala
index 6ad1783d4da5379453830b4481d676e0e65f1063..a4016f3c71a2fdca986a996c124826144c0b8480 100644 (file)
--- a/src/main/scala/devices/i2c/I2CPins.scala
+++ b/src/main/scala/devices/i2c/I2CPins.scala
@@ -15,20 +15,20 @@ class I2CSignals[T <: Data](pingen: () => T) extends Bundle {
     this.getClass.getConstructors.head.newInstance(pingen).asInstanceOf[this.type]
 }
 
-class I2CPins[T <: Pin](pingen: () => T) extends I2CSignals[T](pingen) {
-  override def cloneType: this.type =
-    this.getClass.getConstructors.head.newInstance(pingen).asInstanceOf[this.type]
+class I2CPins[T <: Pin](pingen: () => T) extends I2CSignals[T](pingen)
+
+object I2CPinsFromPort {
 
-  def fromPort(i2c: I2CPort, clock: Clock, reset: Bool, syncStages: Int = 0) = {
+  def apply[T <: Pin](pins: I2CSignals[T], i2c: I2CPort, clock: Clock, reset: Bool, syncStages: Int = 0) = {
     withClockAndReset(clock, reset) {
-      scl.outputPin(i2c.scl.out, pue=true.B, ie = true.B)
-      scl.o.oe := i2c.scl.oe
-      i2c.scl.in := SyncResetSynchronizerShiftReg(scl.i.ival, syncStages, init = Bool(true),
+      pins.scl.outputPin(i2c.scl.out, pue=true.B, ie = true.B)
+      pins.scl.o.oe := i2c.scl.oe
+      i2c.scl.in := SyncResetSynchronizerShiftReg(pins.scl.i.ival, syncStages, init = Bool(true),
         name = Some("i2c_scl_sync"))
 
-      sda.outputPin(i2c.sda.out, pue=true.B, ie = true.B)
-      sda.o.oe := i2c.sda.oe
-      i2c.sda.in := SyncResetSynchronizerShiftReg(sda.i.ival, syncStages, init = Bool(true),
+      pins.sda.outputPin(i2c.sda.out, pue=true.B, ie = true.B)
+      pins.sda.o.oe := i2c.sda.oe
+      i2c.sda.in := SyncResetSynchronizerShiftReg(pins.sda.i.ival, syncStages, init = Bool(true),
         name = Some("i2c_sda_sync"))
     }
   }