devices: create periphery keys for all devices

[sifive-blocks.git] / src / main / scala / devices / mockaon / MockAON.scala

diff --git a/src/main/scala/devices/mockaon/MockAON.scala b/src/main/scala/devices/mockaon/MockAON.scala
index 15af109f15b592611aa2883e1ddd5933f96d2505..71bbfa4928c52b14d7ad488a1928db26e8b328b5 100644 (file)
--- a/src/main/scala/devices/mockaon/MockAON.scala
+++ b/src/main/scala/devices/mockaon/MockAON.scala
@@ -5,13 +5,12 @@ import Chisel._
 import config._
 import regmapper._
 import uncore.tilelink2._
-import rocketchip.PeripheryBusConfig
 
 import sifive.blocks.util.GenericTimer
 
-case class MockAONConfig(
-  address: BigInt = BigInt(0x10000000),
-  nBackupRegs: Int = 16) {
+case class MockAONParams(
+    address: BigInt = BigInt(0x10000000),
+    nBackupRegs: Int = 16) {
   def size: Int = 0x1000
   def regBytes: Int = 4
   def wdogOffset: Int = 0
@@ -20,12 +19,6 @@ case class MockAONConfig(
   def pmuOffset: Int = 0x100
 }
 
-trait HasMockAONParameters {
-  implicit val p: Parameters
-  val params: MockAONConfig
-  val c = params
-}
-
 class MockAONPMUIO extends Bundle {
   val vddpaden = Bool(OUTPUT)
   val dwakeup = Bool(INPUT)
@@ -36,10 +29,10 @@ class MockAONMOffRstIO extends Bundle {
   val corerst = Bool(OUTPUT)
 }
 
-trait MockAONBundle extends Bundle with HasMockAONParameters {
+trait HasMockAONBundleContents extends Bundle {
 
   // Output of the Power Management Sequencer
-  val moff = new MockAONMOffRstIO ()
+  val moff = new MockAONMOffRstIO
 
   // This goes out to wrapper
   // to be combined to create aon_rst.
@@ -56,8 +49,10 @@ trait MockAONBundle extends Bundle with HasMockAONParameters {
   val resetCauses = new ResetCauses().asInput
 }
 
-trait MockAONModule extends Module with HasRegMap with HasMockAONParameters {
-  val io: MockAONBundle
+trait HasMockAONModuleContents extends Module with HasRegMap {
+  val io: HasMockAONBundleContents
+  val params: MockAONParams
+  val c = params
 
   // the expectation here is that Chisel's implicit reset is aonrst,
   // which is asynchronous, so don't use synchronous-reset registers.
@@ -99,7 +94,7 @@ trait MockAONModule extends Module with HasRegMap with HasMockAONParameters {
 
 }
 
-class MockAON(c: MockAONConfig)(implicit p: Parameters)
-  extends TLRegisterRouter(c.address, interrupts = 2, size = c.size, beatBytes = p(PeripheryBusConfig).beatBytes, concurrency = 1)(
-  new TLRegBundle(c, _)    with MockAONBundle)(
-  new TLRegModule(c, _, _) with MockAONModule)
+class TLMockAON(w: Int, c: MockAONParams)(implicit p: Parameters)
+  extends TLRegisterRouter(c.address, interrupts = 2, size = c.size, beatBytes = w, concurrency = 1)(
+  new TLRegBundle(c, _)    with HasMockAONBundleContents)(
+  new TLRegModule(c, _, _) with HasMockAONModuleContents)