Merge pull request #42 from sifive/enhanced_to_base_pin

[sifive-blocks.git] / src / main / scala / devices / pinctrl / PinCtrl.scala

diff --git a/src/main/scala/devices/pinctrl/PinCtrl.scala b/src/main/scala/devices/pinctrl/PinCtrl.scala
index f487d390963d2e44d7261b27644466b42e97d7b0..aadb4e7525aed4ba628ea5a7d461402d220e3296 100644 (file)
--- a/src/main/scala/devices/pinctrl/PinCtrl.scala
+++ b/src/main/scala/devices/pinctrl/PinCtrl.scala
@@ -100,4 +100,11 @@ class EnhancedPin extends Pin() {
     this.o.ds   := ds
     this.o.ie   := ie
   }
     this.o.ds   := ds
     this.o.ie   := ie
   }

+
+  def toBasePin(): BasePin = {
+
+    val base_pin = Wire(new BasePin())
+    base_pin <> this
+    base_pin
+  }

 }
 }