More Peripheral-to-pins cleanups

[sifive-blocks.git] / src / main / scala / devices / pwm / PWMPeriphery.scala

diff --git a/src/main/scala/devices/pwm/PWMPeriphery.scala b/src/main/scala/devices/pwm/PWMPeriphery.scala
index 7b5989661e1b472203a904a7f4499a40118319ba..d22de54db38ef82091e55e0600ba34e696c858c3 100644 (file)
--- a/src/main/scala/devices/pwm/PWMPeriphery.scala
+++ b/src/main/scala/devices/pwm/PWMPeriphery.scala
@@ -43,10 +43,10 @@ trait HasPeripheryPWM extends HasSystemNetworks {
 trait HasPeripheryPWMBundle {
   val pwms: HeterogeneousBag[PWMPortIO]
 
-  def PWMtoGPIOPins(dummy: Int = 1): Seq[PWMGPIOPort] = pwms.map { p =>
-    val pin = Module(new PWMGPIOPort(p.c))
-    pin.io.pwm <> p
-    pin
+  def PWMtoGPIOPins(dummy: Int = 1): Seq[PWMPinsIO] = pwms.map { p =>
+    val pins = Module(new PWMGPIOPort(p.c))
+    pins.io.pwm <> p
+    pins.io.pins
   }
 }