X-Git-Url: https://git.libre-soc.org/?p=sifive-blocks.git;a=blobdiff_plain;f=src%2Fmain%2Fscala%2Fdevices%2Fgpio%2FGPIO.scala;h=f5098cf384d69259089ccdb9dfee6a0cc6e4c3e7;hp=f598dbb00c0dac677202f160b8638e1dd9f85ee1;hb=90404980b8941846f4372a85a9a489d1c52b641a;hpb=90e6ea1d2da7114ade389cc43d82ae202bc18007

diff --git a/src/main/scala/devices/gpio/GPIO.scala b/src/main/scala/devices/gpio/GPIO.scala
index f598dbb..f5098cf 100644
--- a/src/main/scala/devices/gpio/GPIO.scala
+++ b/src/main/scala/devices/gpio/GPIO.scala
@@ -168,10 +168,10 @@ trait HasGPIOModuleContents extends MultiIOModule with HasRegMap {
   val swPinCtrl = Wire(Vec(c.width, new EnhancedPinCtrl()))
 
   // This strips off the valid.
-  val iof0Ctrl = Wire(Vec(c.width, new EnhancedPinCtrl()))
-  val iof1Ctrl = Wire(Vec(c.width, new EnhancedPinCtrl()))
+  val iof0Ctrl = Wire(Vec(c.width, new IOFCtrl()))
+  val iof1Ctrl = Wire(Vec(c.width, new IOFCtrl()))
 
-  val iofCtrl = Wire(Vec(c.width, new EnhancedPinCtrl()))
+  val iofCtrl = Wire(Vec(c.width, new IOFCtrl()))
   val iofPlusSwPinCtrl = Wire(Vec(c.width, new EnhancedPinCtrl()))
 
   for (pin <- 0 until c.width) {