X-Git-Url: https://git.libre-soc.org/?p=sifive-blocks.git;a=blobdiff_plain;f=src%2Fmain%2Fscala%2Fdevices%2Fi2c%2FI2CPins.scala;fp=src%2Fmain%2Fscala%2Fdevices%2Fi2c%2FI2CPins.scala;h=a4016f3c71a2fdca986a996c124826144c0b8480;hp=6bf40aedd5526975ebfd5fe7ecb186b643927c09;hb=fe65a87c5c94466ce17896cfd896c8e7c127d79b;hpb=f8dcfbacfa2517ff195d06f03459c23c7c194634

diff --git a/src/main/scala/devices/i2c/I2CPins.scala b/src/main/scala/devices/i2c/I2CPins.scala
index 6bf40ae..a4016f3 100644
--- a/src/main/scala/devices/i2c/I2CPins.scala
+++ b/src/main/scala/devices/i2c/I2CPins.scala
@@ -6,24 +6,29 @@ import chisel3.experimental.{withClockAndReset}
 import freechips.rocketchip.util.SyncResetSynchronizerShiftReg
 import sifive.blocks.devices.pinctrl.{Pin, PinCtrl}
 
-class I2CPins[T <: Pin](pingen: () => T) extends Bundle {
+class I2CSignals[T <: Data](pingen: () => T) extends Bundle {
 
   val scl: T = pingen()
   val sda: T = pingen()
 
   override def cloneType: this.type =
     this.getClass.getConstructors.head.newInstance(pingen).asInstanceOf[this.type]
+}
+
+class I2CPins[T <: Pin](pingen: () => T) extends I2CSignals[T](pingen)
+
+object I2CPinsFromPort {
 
-  def fromPort(i2c: I2CPort, clock: Clock, reset: Bool, syncStages: Int = 0) = {
+  def apply[T <: Pin](pins: I2CSignals[T], i2c: I2CPort, clock: Clock, reset: Bool, syncStages: Int = 0) = {
     withClockAndReset(clock, reset) {
-      scl.outputPin(i2c.scl.out, pue=true.B, ie = true.B)
-      scl.o.oe := i2c.scl.oe
-      i2c.scl.in := SyncResetSynchronizerShiftReg(scl.i.ival, syncStages, init = Bool(true),
+      pins.scl.outputPin(i2c.scl.out, pue=true.B, ie = true.B)
+      pins.scl.o.oe := i2c.scl.oe
+      i2c.scl.in := SyncResetSynchronizerShiftReg(pins.scl.i.ival, syncStages, init = Bool(true),
         name = Some("i2c_scl_sync"))
 
-      sda.outputPin(i2c.sda.out, pue=true.B, ie = true.B)
-      sda.o.oe := i2c.sda.oe
-      i2c.sda.in := SyncResetSynchronizerShiftReg(sda.i.ival, syncStages, init = Bool(true),
+      pins.sda.outputPin(i2c.sda.out, pue=true.B, ie = true.B)
+      pins.sda.o.oe := i2c.sda.oe
+      i2c.sda.in := SyncResetSynchronizerShiftReg(pins.sda.i.ival, syncStages, init = Bool(true),
         name = Some("i2c_sda_sync"))
     }
   }