X-Git-Url: https://git.libre-soc.org/?p=sifive-blocks.git;a=blobdiff_plain;f=src%2Fmain%2Fscala%2Fdevices%2Fspi%2FTLSPIFlash.scala;h=8968c69bec666baa3c78d8ffce12c4242bd31fcf;hp=fc786f58ff8488ccde6d49217b7425f8b0a6c609;hb=a8e20f447c64d485901b62b4dc48d4761fc9f09a;hpb=3d8c502fce3f4920b226026c07fd47325af5fba1

diff --git a/src/main/scala/devices/spi/TLSPIFlash.scala b/src/main/scala/devices/spi/TLSPIFlash.scala
index fc786f5..8968c69 100644
--- a/src/main/scala/devices/spi/TLSPIFlash.scala
+++ b/src/main/scala/devices/spi/TLSPIFlash.scala
@@ -95,7 +95,7 @@ abstract class TLSPIFlashBase(w: Int, c: SPIFlashParamsBase)(implicit p: Paramet
   require(isPow2(c.fSize))
   val fnode = TLManagerNode(1, TLManagerParameters(
     address     = Seq(AddressSet(c.fAddress, c.fSize-1)),
-    resources   = Seq(Resource(device, "ranges")),
+    resources   = device.reg("mem"),
     regionType  = RegionType.UNCACHED,
     executable  = true,
     supportsGet = TransferSizes(1, 1),