From 06f0d2074237f3fa23275446f1ee74614e61f96e Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Thu, 20 Jul 2017 11:36:31 -0700 Subject: [PATCH] Add missing cloneType methods to pin bundles --- src/main/scala/devices/i2c/I2CPins.scala | 3 +++ src/main/scala/devices/pwm/PWMPeriphery.scala | 3 +++ src/main/scala/devices/spi/SPIPins.scala | 9 ++++++--- src/main/scala/devices/uart/UARTPeriphery.scala | 3 +++ 4 files changed, 15 insertions(+), 3 deletions(-) diff --git a/src/main/scala/devices/i2c/I2CPins.scala b/src/main/scala/devices/i2c/I2CPins.scala index df6dd6f..8e17765 100644 --- a/src/main/scala/devices/i2c/I2CPins.scala +++ b/src/main/scala/devices/i2c/I2CPins.scala @@ -12,6 +12,9 @@ class I2CPins[T <: Pin](pingen: () => T) extends Bundle { val scl: T = pingen() val sda: T = pingen() + override def cloneType: this.type = + this.getClass.getConstructors.head.newInstance(pingen).asInstanceOf[this.type] + def fromI2CPort(i2c: I2CPort, clock: Clock, reset: Bool, syncStages: Int = 0) = { withClockAndReset(clock, reset) { scl.outputPin(i2c.scl.out, pue=true.B, ie = true.B) diff --git a/src/main/scala/devices/pwm/PWMPeriphery.scala b/src/main/scala/devices/pwm/PWMPeriphery.scala index 31ad5f6..f83cbaf 100644 --- a/src/main/scala/devices/pwm/PWMPeriphery.scala +++ b/src/main/scala/devices/pwm/PWMPeriphery.scala @@ -18,6 +18,9 @@ class PWMPins[T <: Pin] (pingen: ()=> T, val c: PWMParams) extends Bundle { val pwm: Vec[T] = Vec(c.ncmp, pingen()) + override def cloneType: this.type = + this.getClass.getConstructors.head.newInstance(pingen, c).asInstanceOf[this.type] + def fromPWMPort(port: PWMPortIO) { (pwm zip port.port) foreach {case (pin, port) => pin.outputPin(port) diff --git a/src/main/scala/devices/spi/SPIPins.scala b/src/main/scala/devices/spi/SPIPins.scala index 346f8ee..4307fad 100644 --- a/src/main/scala/devices/spi/SPIPins.scala +++ b/src/main/scala/devices/spi/SPIPins.scala @@ -7,9 +7,12 @@ import sifive.blocks.devices.pinctrl.{PinCtrl, Pin} class SPIPins[T <: Pin] (pingen: ()=> T, c: SPIParamsBase) extends SPIBundle(c) { - val sck: T = pingen() - val dq: Vec[T] = Vec(4, pingen()) - val cs: Vec[T] = Vec(c.csWidth, pingen()) + val sck = pingen() + val dq = Vec(4, pingen()) + val cs = Vec(c.csWidth, pingen()) + + override def cloneType: this.type = + this.getClass.getConstructors.head.newInstance(pingen, c).asInstanceOf[this.type] def fromSPIPort(spi: SPIPortIO, clock: Clock, reset: Bool, syncStages: Int = 0, driveStrength: Bool = Bool(false)) { diff --git a/src/main/scala/devices/uart/UARTPeriphery.scala b/src/main/scala/devices/uart/UARTPeriphery.scala index d94d518..105592d 100644 --- a/src/main/scala/devices/uart/UARTPeriphery.scala +++ b/src/main/scala/devices/uart/UARTPeriphery.scala @@ -44,6 +44,9 @@ class UARTPins[T <: Pin] (pingen: () => T) extends Bundle { val rxd = pingen() val txd = pingen() + override def cloneType: this.type = + this.getClass.getConstructors.head.newInstance(pingen).asInstanceOf[this.type] + def fromUARTPort(uart: UARTPortIO, clock: Clock, reset: Bool, syncStages: Int = 0) { withClockAndReset(clock, reset) { txd.outputPin(uart.txd) -- 2.30.2