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spi: put a request buffer infront of SPI
2017-08-19
Wesley W. Terpstra
spi: put a request buffer infront of SPI
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2017-07-26
Wesley W. Terpstra
spi: remove removed sink arg
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2017-06-29
Wesley W. Terpstra
mig: fix MemoryDevice to use 'reg' properly
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2017-05-13
Wesley W. Terpstra
vc707mig: use an external ibuf
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2017-05-13
Wesley W. Terpstra
xilinxvc707pciex1: push to a dedicated clock domain
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2017-04-26
Wesley W. Terpstra
axi4: switch to new pipelined converters
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2017-03-03
Wesley W. Terpstra
xilinx pcie: add the high PCIe address bits (physical...
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2017-02-04
Wesley W. Terpstra
xilinx mig: track changes in rocket-chip
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commitdiff
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2017-02-01
Wesley W. Terpstra
sifive-blocks: trust diplomacy to get names right
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2017-01-31
Wesley W. Terpstra
spi: work around ucb-bar/chisel3#472
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2017-01-30
Wesley W. Terpstra
xilinx ip: adjust to new diplomacy API
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2017-01-21
Wesley W. Terpstra
xilinx pcie: put buffers before the outputs to the...
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2017-01-20
Wesley W. Terpstra
mig: track change to Blind port API in rocket
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2016-12-07
Wesley W. Terpstra
LazyModule: provide Parameters
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2016-12-07
Wesley W. Terpstra
xilinx pcie: bytes, not bits
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2016-12-03
Wesley W. Terpstra
RegMapFIFO: amoor.w can do thread-safe TX
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