X-Git-Url: https://git.libre-soc.org/?p=soc.git;a=blobdiff_plain;f=src%2FTLB%2Ftest%2Ftest_tlb.py;h=73f34e4db8f20aa919ca9a7e3d56185e427f6840;hp=8e26130a90888e3fdfe2bab55b1fa3759071ccba;hb=8db2c7353efa0885d95a00a55435959390bbc947;hpb=b7aad51f4f5a13a86f347d33abdac841d74a70bd

diff --git a/src/TLB/test/test_tlb.py b/src/TLB/test/test_tlb.py
index 8e26130a..73f34e4d 100644
--- a/src/TLB/test/test_tlb.py
+++ b/src/TLB/test/test_tlb.py
@@ -1,6 +1,5 @@
-import tracemalloc
-
-tracemalloc.start()
+#import tracemalloc
+#tracemalloc.start()
 
 from nmigen.compat.sim import run_simulation
 
@@ -9,12 +8,13 @@ from TLB.TLB import TLB
 from TestUtil.test_helper import assert_op
 
 def tbench(dut):
-    pass
+    yield
+    yield
+    #TODO
 
 def test_tlb():
-    #FIXME UnusedElaboratable when the following line is uncommented
-    #dut = TLB(15,36,64,8)
-    #run_simulation(dut, tbench(dut), vcd_name="Waveforms/test_tlb.vcd")
+    dut = TLB(15,36,64,8)
+    run_simulation(dut, tbench(dut), vcd_name="Waveforms/test_tlb.vcd")
     print("TLB Unit Test TODO")
 
 if __name__ == "__main__":