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(parent: 7d19ce2) | patch
pass atomic reserve through from PortInterface to DCache
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 15 Jan 2022 14:21:50 +0000 (14:21 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 15 Jan 2022 14:21:50 +0000 (14:21 +0000)
commit0b1e61841ab52c2d2320f8cd1e927582fab0de1a
tree675d41c211db0ad649eb22e7ecee7346ba8f8de6tree
parent7d19ce2e8df17c763aae371ccaf79825e9724edecommit | diff
pass atomic reserve through from PortInterface to DCache
not yet doing anything with it, so should be fine
src/soc/fu/ldst/loadstore.py diff | blob | history