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(parent: 7cb40b0) | patch
add a second LD request to dcache which is merged with first,
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 8 Jan 2022 15:26:03 +0000 (15:26 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 8 Jan 2022 15:26:03 +0000 (15:26 +0000)
commit2de5328dc9d57a7016f2da265d290c9b1f21c827
tree64727c0e015dca7b376bc6d85078701ddf0ee69ctree
parent7cb40b0b1cd8c5382a2c9a8ab30ac8b693b3d2accommit | diff
add a second LD request to dcache which is merged with first,
to implement mis-aligned LD operations
src/soc/experiment/test/test_ldst_pi_misalign.py diff | blob | history
src/soc/fu/ldst/loadstore.py diff | blob | history