projects / soc.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: be84acc) | patch
add SysCon reg_info, has uart and has large SYSCON
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 15 Feb 2022 19:24:37 +0000 (19:24 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 15 Feb 2022 19:24:37 +0000 (19:24 +0000)
commit397e9898f664ce9268ff81b431f4940be132321b
treee90a23e455f56943bf482f8d44c26716d83800f9tree
parentbe84acce27e2b0da47c3ca73ac96eec80f5c72cacommit | diff
add SysCon reg_info, has uart and has large SYSCON
src/soc/bus/syscon.py diff | blob | history