add 3 more 4k SRAMs, change WB bus width to 64 in ls180 litex
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 3 Dec 2020 15:34:33 +0000 (15:34 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 3 Dec 2020 15:34:36 +0000 (15:34 +0000)
commit3a2999107797c8ffb756126797bfb8c868eb93de
treec3e12a775c16a430b88b1d950a3094ef7377c474
parent041affe55388ff708be4950e6ca847b21a55143b
add 3 more 4k SRAMs, change WB bus width to 64 in ls180 litex
src/soc/litex/florent/Makefile
src/soc/litex/florent/ls180soc.py