try making CR bitrange 32..63 not 0..31
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 7 Apr 2020 18:46:03 +0000 (19:46 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 7 Apr 2020 18:46:03 +0000 (19:46 +0100)
commit4862ecb4bbd49b45dd2e374122ecbdb0121ff822
tree3a344326993ba4c59aa67d7e455a2ef3eaeaf6cf
parentdaec7884b0063698ee2125f6dfe4744b3ddcbf5e
try making CR bitrange 32..63 not 0..31
src/soc/decoder/isa/caller.py
src/soc/decoder/power_fields.py
src/soc/decoder/selectable_int.py