add predication read ports (CR and INT)
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 17 Mar 2021 13:21:25 +0000 (13:21 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 17 Mar 2021 13:21:25 +0000 (13:21 +0000)
commit65e1dd9ef1d661928a2ed4125fb9d544c48da969
treeb55c775dc76020d4e43289d08b46b15c4330c364
parent4503683e7b8bd78080337b282688e1ad04628d45
add predication read ports (CR and INT)
src/soc/regfile/regfiles.py