whoops issuer_verilog.py enabling mmu has to pass microwatt_mmu
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 21 Dec 2021 15:57:37 +0000 (15:57 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 21 Dec 2021 15:57:37 +0000 (15:57 +0000)
commitf10c64c74530eb6400136e73648f5d31e6da092a
tree2bc1956b3a164dfb39be7375af74169b39f3046e
parent884253f76482a4e306402d8d826197de8c30e401
whoops issuer_verilog.py enabling mmu has to pass microwatt_mmu
option to TestMemPSpec
src/soc/simple/issuer_verilog.py