From: Luke Kenneth Casson Leighton Date: Tue, 30 Mar 2021 11:29:56 +0000 (+0100) Subject: corrections to Makefile for building / not-building 4k sram ls180 X-Git-Url: https://git.libre-soc.org/?p=soc.git;a=commitdiff_plain;h=434ee06553fc53e46da2282d7017fa68dfa4fb13 corrections to Makefile for building / not-building 4k sram ls180 --- diff --git a/Makefile b/Makefile index b7d73ee5..abb446dd 100644 --- a/Makefile +++ b/Makefile @@ -49,8 +49,8 @@ ls180_4k_verilog: src/soc/litex/florent/libresoc/libresoc.v # build the litex libresoc SoC without 4k SRAMs -ls180_4ksram_verilog_build: ls180_verilog - make -C soc/soc/litex/florent ls1804k +ls180_verilog_build: ls180_verilog + make -C soc/soc/litex/florent ls180 # build the litex libresoc SoC with 4k SRAMs ls180_4ksram_verilog_build: ls180_4k_verilog diff --git a/libreriscv b/libreriscv index 365cec3d..3b584fe6 160000 --- a/libreriscv +++ b/libreriscv @@ -1 +1 @@ -Subproject commit 365cec3d5377e618199acfdf7f26545238aacdca +Subproject commit 3b584fe6ab11bf1d499d28f8cab40d2454bd9585 diff --git a/src/soc/litex/florent b/src/soc/litex/florent index 3f163ae1..47083f35 160000 --- a/src/soc/litex/florent +++ b/src/soc/litex/florent @@ -1 +1 @@ -Subproject commit 3f163ae167c3d17b3e8cc2a050a60ab20a6bdba2 +Subproject commit 47083f3531935d83fd1dfe98faf465cad8804cff