soc.git
2 months agotlb_content now supports 512G pages master
Tobias Platen [Mon, 16 Sep 2019 16:42:15 +0000 (18:42 +0200)]
tlb_content now supports 512G pages

2 months agoterapage lookup
Tobias Platen [Wed, 11 Sep 2019 19:14:11 +0000 (21:14 +0200)]
terapage lookup

2 months agotlb_content update test
Tobias Platen [Tue, 10 Sep 2019 19:35:27 +0000 (21:35 +0200)]
tlb_content update test

2 months agoadd unittest for tlb_content.py
Tobias Platen [Mon, 9 Sep 2019 18:31:06 +0000 (20:31 +0200)]
add unittest for tlb_content.py

2 months agoforgot to add one signal
Tobias Platen [Sun, 25 Aug 2019 17:31:34 +0000 (19:31 +0200)]
forgot to add one signal

2 months agoadd is_512G to the data structure
Tobias Platen [Sat, 24 Aug 2019 14:15:19 +0000 (16:15 +0200)]
add is_512G to the data structure

3 months agopartial Unit Test for TLB
Tobias Platen [Wed, 7 Aug 2019 18:31:43 +0000 (20:31 +0200)]
partial Unit Test for TLB

3 months agotlb_test WIP
Tobias Platen [Sun, 4 Aug 2019 12:15:01 +0000 (14:15 +0200)]
tlb_test WIP

3 months agomove priority picker to nmutil
Luke Kenneth Casson Leighton [Thu, 1 Aug 2019 07:49:08 +0000 (08:49 +0100)]
move priority picker to nmutil

3 months agoMerge branch 'master' of https://git.libre-riscv.org/git/soc
Tobias Platen [Thu, 25 Jul 2019 19:43:00 +0000 (21:43 +0200)]
Merge branch 'master' of https://git.libre-riscv.org/git/soc

3 months agofix UnusedElaboratable warning in TLB code
Tobias Platen [Thu, 25 Jul 2019 19:41:37 +0000 (21:41 +0200)]
fix UnusedElaboratable warning in TLB code

3 months agoadd TLB elaboratable
Luke Kenneth Casson Leighton [Wed, 24 Jul 2019 21:47:32 +0000 (22:47 +0100)]
add TLB elaboratable

3 months agoTLB testbench WIP
Tobias Platen [Sun, 21 Jul 2019 16:09:19 +0000 (18:09 +0200)]
TLB testbench WIP

3 months agoimplement page table lookup using 4 levels
isengaara [Sun, 21 Jul 2019 11:31:43 +0000 (13:31 +0200)]
implement page table lookup using 4 levels

5 months agoforgot to pull ld_o/st_o through from LDST CompUnits
Luke Kenneth Casson Leighton [Wed, 19 Jun 2019 06:02:15 +0000 (07:02 +0100)]
forgot to pull ld_o/st_o through from LDST CompUnits

5 months agosort out address match global nomatch signal
Luke Kenneth Casson Leighton [Wed, 19 Jun 2019 05:47:01 +0000 (06:47 +0100)]
sort out address match global nomatch signal

5 months agomove mem into scoreboard (really should be outside, as should regfile)
Luke Kenneth Casson Leighton [Tue, 18 Jun 2019 16:09:35 +0000 (17:09 +0100)]
move mem into scoreboard (really should be outside, as should regfile)
add mempick GroupPicker

5 months agoadd separate read/write port
Luke Kenneth Casson Leighton [Tue, 18 Jun 2019 12:39:46 +0000 (13:39 +0100)]
add separate read/write port

5 months agowhoops syntax error
Luke Kenneth Casson Leighton [Tue, 18 Jun 2019 09:28:15 +0000 (10:28 +0100)]
whoops syntax error

5 months agowrite out data only on go_write
Luke Kenneth Casson Leighton [Tue, 18 Jun 2019 09:27:50 +0000 (10:27 +0100)]
write out data only on go_write

5 months agoclarify comment
Luke Kenneth Casson Leighton [Tue, 18 Jun 2019 09:03:52 +0000 (10:03 +0100)]
clarify comment

5 months agoadd address and output mode from LDSTCUs
Luke Kenneth Casson Leighton [Tue, 18 Jun 2019 09:01:26 +0000 (10:01 +0100)]
add address and output mode from LDSTCUs

5 months agosort out go_ld_i and go_st_i
Luke Kenneth Casson Leighton [Tue, 18 Jun 2019 08:26:25 +0000 (09:26 +0100)]
sort out go_ld_i and go_st_i

5 months agoadd temporary immediate-activation of go_addr on adr_rel request
Luke Kenneth Casson Leighton [Tue, 18 Jun 2019 06:13:53 +0000 (07:13 +0100)]
add temporary immediate-activation of go_addr on adr_rel request

5 months agoadd transitive accumulation of LD/STs into MDM
Luke Kenneth Casson Leighton [Mon, 17 Jun 2019 06:05:13 +0000 (07:05 +0100)]
add transitive accumulation of LD/STs into MDM

5 months agoremove TODO (done)
Luke Kenneth Casson Leighton [Mon, 17 Jun 2019 05:50:29 +0000 (06:50 +0100)]
remove TODO (done)

5 months agofix several test imports, add Elaboratable
Luke Kenneth Casson Leighton [Sun, 16 Jun 2019 13:38:51 +0000 (14:38 +0100)]
fix several test imports, add Elaboratable

5 months agofix test run errors
Luke Kenneth Casson Leighton [Sun, 16 Jun 2019 13:32:54 +0000 (14:32 +0100)]
fix test run errors

5 months agorename match to nomatch, connect ld_i and st_i
Luke Kenneth Casson Leighton [Sat, 15 Jun 2019 13:10:03 +0000 (14:10 +0100)]
rename match to nomatch, connect ld_i and st_i

5 months agoconvert addr match into latched (SRLatch) version, activate on req_rel,
Luke Kenneth Casson Leighton [Sat, 15 Jun 2019 07:41:48 +0000 (08:41 +0100)]
convert addr match into latched (SRLatch) version, activate on req_rel,
deactivate on busy

5 months agouse new ready/valid to ALU in CompLDST
Luke Kenneth Casson Leighton [Sat, 15 Jun 2019 04:58:13 +0000 (05:58 +0100)]
use new ready/valid to ALU in CompLDST

5 months agostart connecting memory function unit
Luke Kenneth Casson Leighton [Mon, 10 Jun 2019 12:07:05 +0000 (13:07 +0100)]
start connecting memory function unit

5 months agoonly set adr_rel_o on LD or ADD/SUB, must wait for go_ad_i
Luke Kenneth Casson Leighton [Mon, 10 Jun 2019 11:52:57 +0000 (12:52 +0100)]
only set adr_rel_o on LD or ADD/SUB, must wait for go_ad_i

5 months agostarting to run into things being broken in LD/ST Comp (yay)
Luke Kenneth Casson Leighton [Mon, 10 Jun 2019 10:34:14 +0000 (11:34 +0100)]
starting to run into things being broken in LD/ST Comp (yay)

5 months agoproperly set the number of integer ALUs (2 at the moment)
Luke Kenneth Casson Leighton [Mon, 10 Jun 2019 10:16:19 +0000 (11:16 +0100)]
properly set the number of integer ALUs (2 at the moment)

5 months agoset number of ALUs to 2
Luke Kenneth Casson Leighton [Mon, 10 Jun 2019 10:12:09 +0000 (11:12 +0100)]
set number of ALUs to 2

5 months agotest LD/ST issue
Luke Kenneth Casson Leighton [Mon, 10 Jun 2019 09:18:00 +0000 (10:18 +0100)]
test LD/ST issue

5 months agoadd in ld/st operand pseudo-opcode
Luke Kenneth Casson Leighton [Mon, 10 Jun 2019 08:03:38 +0000 (09:03 +0100)]
add in ld/st operand pseudo-opcode

5 months agoadd in a TestMemory class
Luke Kenneth Casson Leighton [Mon, 10 Jun 2019 07:41:36 +0000 (08:41 +0100)]
add in a TestMemory class

5 months agoadded in the LD/ST Comp Unit (not connected up yet) and the code didnt fall over
Luke Kenneth Casson Leighton [Mon, 10 Jun 2019 05:03:25 +0000 (06:03 +0100)]
added in the LD/ST Comp Unit (not connected up yet) and the code didnt fall over
amazing that the unit test still runs, first time.

particularly that the number of INT ALUs was reduced from 4 to 2

5 months agomove MemFunctionUnits to separate module
Luke Kenneth Casson Leighton [Mon, 10 Jun 2019 04:30:41 +0000 (05:30 +0100)]
move MemFunctionUnits to separate module

5 months agomove FUMemMatchMatrix to mdm module
Luke Kenneth Casson Leighton [Mon, 10 Jun 2019 04:24:55 +0000 (05:24 +0100)]
move FUMemMatchMatrix to mdm module

5 months agolink address matching inputs to outside MemMatrix, preliminary test works
Luke Kenneth Casson Leighton [Sun, 9 Jun 2019 11:25:51 +0000 (12:25 +0100)]
link address matching inputs to outside MemMatrix, preliminary test works

5 months agobring in cancel array into FURegDepMatrix
Luke Kenneth Casson Leighton [Sun, 9 Jun 2019 10:53:41 +0000 (11:53 +0100)]
bring in cancel array into FURegDepMatrix

use in class which merges Partial Addr Match with FURegDepMatrix to
create a MDM (Memory Dependency Matrix)

5 months agomake partialaddrmatch a matrix
Luke Kenneth Casson Leighton [Sun, 9 Jun 2019 08:48:43 +0000 (09:48 +0100)]
make partialaddrmatch a matrix

5 months agorename variables
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 23:41:24 +0000 (00:41 +0100)]
rename variables

5 months agoadd 2nd test for mem dependency, use FU-Regs and FU-FU matrices
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 13:50:59 +0000 (14:50 +0100)]
add 2nd test for mem dependency, use FU-Regs and FU-FU matrices

5 months agoconvert Reg_Rsv and rest of FU_Reg Matrix to variable n_src
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 13:39:09 +0000 (14:39 +0100)]
convert Reg_Rsv and rest of FU_Reg Matrix to variable n_src

5 months agouse loop around src nums in FU Reg Matrix
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 13:33:39 +0000 (14:33 +0100)]
use loop around src nums in FU Reg Matrix

5 months agoconvert FU_RW_Pend accumulator to src-vector
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 13:30:25 +0000 (14:30 +0100)]
convert FU_RW_Pend accumulator to src-vector

5 months agoremove unneeded signals
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 13:18:09 +0000 (14:18 +0100)]
remove unneeded signals

5 months agostart propagating arrays of src regs up through dependency matrix
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 12:12:25 +0000 (13:12 +0100)]
start propagating arrays of src regs up through dependency matrix

5 months agowhitespace
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 12:00:26 +0000 (13:00 +0100)]
whitespace

5 months agowhoops use reduce(or_) not bool to merge bitwise src in dep cells
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 11:59:54 +0000 (12:59 +0100)]
whoops use reduce(or_) not bool to merge bitwise src in dep cells

5 months agouse new array-based dep cell in dep matrix
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 11:51:23 +0000 (12:51 +0100)]
use new array-based dep cell in dep matrix

5 months agodependence cell to use arrays
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 11:44:59 +0000 (12:44 +0100)]
dependence cell to use arrays

5 months agoreordering connections on mem-dep matrices
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 11:33:17 +0000 (12:33 +0100)]
reordering connections on mem-dep matrices

5 months agoexperiment connecting ld/st matrix to fu/mem one
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 08:05:20 +0000 (09:05 +0100)]
experiment connecting ld/st matrix to fu/mem one

5 months agoadd fu-mem versions of fu-fu matrix and picker vec
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 06:46:29 +0000 (07:46 +0100)]
add fu-mem versions of fu-fu matrix and picker vec

5 months agorename rsel vectors in mem dep cell
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 06:38:17 +0000 (07:38 +0100)]
rename rsel vectors in mem dep cell

5 months agoadd fu-mem dependency cell based on fu_dep_cell.py
Luke Kenneth Casson Leighton [Sat, 8 Jun 2019 06:37:57 +0000 (07:37 +0100)]
add fu-mem dependency cell based on fu_dep_cell.py

5 months agorename v_rd_rsel_o in dependence cell as well
Luke Kenneth Casson Leighton [Fri, 7 Jun 2019 22:20:12 +0000 (23:20 +0100)]
rename v_rd_rsel_o in dependence cell as well

5 months agorename fu-regs rd/wr sel vector
Luke Kenneth Casson Leighton [Fri, 7 Jun 2019 22:17:52 +0000 (23:17 +0100)]
rename fu-regs rd/wr sel vector

5 months agoextend ld/st mem test
Luke Kenneth Casson Leighton [Fri, 7 Jun 2019 22:17:34 +0000 (23:17 +0100)]
extend ld/st mem test

5 months agostart preliminary test of load/store dependency matrices
Luke Kenneth Casson Leighton [Fri, 7 Jun 2019 09:32:00 +0000 (10:32 +0100)]
start preliminary test of load/store dependency matrices

5 months agocontinue miss_handler.py conversion
Luke Kenneth Casson Leighton [Fri, 7 Jun 2019 09:31:05 +0000 (10:31 +0100)]
continue miss_handler.py conversion

5 months agoadd first conversion of ariane miss handler, WIP
Luke Kenneth Casson Leighton [Thu, 6 Jun 2019 19:25:16 +0000 (20:25 +0100)]
add first conversion of ariane miss handler, WIP

5 months agorename load_i and stor_i to ld_pend_i / st_pend_i, match names in MemFUDepMatrix
Luke Kenneth Casson Leighton [Wed, 5 Jun 2019 07:58:26 +0000 (08:58 +0100)]
rename load_i and stor_i to ld_pend_i / st_pend_i, match names in MemFUDepMatrix

5 months agoadd mirror copy of FU_Regs Dep Matrix, names changed, adapted to LD/ST
Luke Kenneth Casson Leighton [Wed, 5 Jun 2019 05:43:14 +0000 (06:43 +0100)]
add mirror copy of FU_Regs Dep Matrix, names changed, adapted to LD/ST

wr -> ld
dest -> ld
rd -> st
src1 -> st

global search and replace.

5 months agoadd addrgen comment
Luke Kenneth Casson Leighton [Wed, 5 Jun 2019 05:22:55 +0000 (06:22 +0100)]
add addrgen comment

5 months agoadd docstring for address match comparator
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 14:03:30 +0000 (15:03 +0100)]
add docstring for address match comparator

5 months agoadd to docstring
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 09:36:27 +0000 (10:36 +0100)]
add to docstring

5 months agoconnect up LD/ST matrix properly
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 08:13:14 +0000 (09:13 +0100)]
connect up LD/ST matrix properly

5 months agoadd ldst_matrix.py back in, needs some work though
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 07:41:34 +0000 (08:41 +0100)]
add ldst_matrix.py back in, needs some work though

5 months agowhoops connect vector by y not x in FUFU matrix
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 04:53:42 +0000 (05:53 +0100)]
whoops connect vector by y not x in FUFU matrix

5 months agoallow branch immediate
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 00:38:38 +0000 (01:38 +0100)]
allow branch immediate

5 months agoreasonably sure that the pipelined ALU will work...
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 00:32:58 +0000 (01:32 +0100)]
reasonably sure that the pipelined ALU will work...

5 months agotry random instructions test with immediates, works ok
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 14:07:56 +0000 (15:07 +0100)]
try random instructions test with immediates, works ok

5 months agoadd immediate to ALU instructions
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 14:03:55 +0000 (15:03 +0100)]
add immediate to ALU instructions

5 months agoadd immediate arg to instr
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 13:47:24 +0000 (14:47 +0100)]
add immediate arg to instr

5 months agoremove unneeded code
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 13:29:25 +0000 (14:29 +0100)]
remove unneeded code

5 months agoadd operand-is-immediate to sim and instructions
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 13:28:24 +0000 (14:28 +0100)]
add operand-is-immediate to sim and instructions

5 months agoadd op is immediate to instruction q
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 13:24:10 +0000 (14:24 +0100)]
add op is immediate to instruction q

5 months agostart adding in immediates into CompUnit ALU
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 13:04:08 +0000 (14:04 +0100)]
start adding in immediates into CompUnit ALU

5 months agoremove unneeded code
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 12:43:31 +0000 (13:43 +0100)]
remove unneeded code

5 months agowhoops forgot to make CU decisions based on latched opcode
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 12:43:11 +0000 (13:43 +0100)]
whoops forgot to make CU decisions based on latched opcode

5 months agowhoops search/replace error
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 12:37:08 +0000 (13:37 +0100)]
whoops search/replace error

5 months agoadd MemSim, remove redundant signal
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 12:24:46 +0000 (13:24 +0100)]
add MemSim, remove redundant signal

5 months agoLDSTDepCell can act as a matrix
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 00:47:01 +0000 (01:47 +0100)]
LDSTDepCell can act as a matrix

5 months agoshorten by adding temp comb = m.d.comb
Luke Kenneth Casson Leighton [Sat, 1 Jun 2019 14:29:43 +0000 (15:29 +0100)]
shorten by adding temp comb = m.d.comb

5 months agoaddr release only on op_ldst
Luke Kenneth Casson Leighton [Sat, 1 Jun 2019 14:28:12 +0000 (15:28 +0100)]
addr release only on op_ldst

5 months agodebug comp_ldst
Luke Kenneth Casson Leighton [Sat, 1 Jun 2019 14:18:50 +0000 (15:18 +0100)]
debug comp_ldst

5 months agomake use of busy_o clearer
Luke Kenneth Casson Leighton [Sat, 1 Jun 2019 13:14:29 +0000 (14:14 +0100)]
make use of busy_o clearer

5 months agoadd LDST Computation Unit (in progress)
Luke Kenneth Casson Leighton [Sat, 1 Jun 2019 13:09:53 +0000 (14:09 +0100)]
add LDST Computation Unit (in progress)

5 months agomulti-bit LD?ST and add go_die
Luke Kenneth Casson Leighton [Sat, 1 Jun 2019 13:08:53 +0000 (14:08 +0100)]
multi-bit LD?ST and add go_die

5 months agoissue from q is combinatorial so do not need set to zer0
Luke Kenneth Casson Leighton [Fri, 31 May 2019 21:05:25 +0000 (22:05 +0100)]
issue from q is combinatorial so do not need set to zer0

5 months agouse instruction issue queue to get instructions into engine
Luke Kenneth Casson Leighton [Fri, 31 May 2019 20:37:52 +0000 (21:37 +0100)]
use instruction issue queue to get instructions into engine

5 months agogot instruction queue working
Luke Kenneth Casson Leighton [Fri, 31 May 2019 07:10:07 +0000 (08:10 +0100)]
got instruction queue working

5 months agoleave off number being subtracted from "ready_o" calculation
Luke Kenneth Casson Leighton [Thu, 30 May 2019 21:31:53 +0000 (22:31 +0100)]
leave off number being subtracted from "ready_o" calculation

5 months agoadd instruction queue test
Luke Kenneth Casson Leighton [Thu, 30 May 2019 21:19:40 +0000 (22:19 +0100)]
add instruction queue test