From 46702f16c88a1397b53aa7dde99a07acbae970e1 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 8 Jun 2019 12:33:17 +0100 Subject: [PATCH] reordering connections on mem-dep matrices --- src/scoreboard/ldst_matrix.py | 24 ++++++++++-------------- src/scoreboard/test_mem_fu_matrix.py | 18 ++++++++++++------ 2 files changed, 22 insertions(+), 20 deletions(-) diff --git a/src/scoreboard/ldst_matrix.py b/src/scoreboard/ldst_matrix.py index e0209547..1bb75b03 100644 --- a/src/scoreboard/ldst_matrix.py +++ b/src/scoreboard/ldst_matrix.py @@ -74,8 +74,6 @@ class LDSTDepMatrix(Elaboratable): # --- lhs_l = [] shl_l = [] - load_l = [] - stor_l = [] issue_l = [] go_die_l = [] lh_l = [] @@ -86,20 +84,18 @@ class LDSTDepMatrix(Elaboratable): lhs_l.append(dc.ld_hold_st_o) shl_l.append(dc.st_hold_ld_o) # accumulate inputs (for Cat'ing later) - TODO: must be a better way - load_l.append(dc.load_h_i) - stor_l.append(dc.stor_h_i) issue_l.append(dc.issue_i) go_die_l.append(dc.go_die_i) # load-hit and store-with-data-hit go in vertically (top) m.d.comb += [dc.load_hit_i.eq(self.load_hit_i), - dc.stwd_hit_i.eq(self.stwd_hit_i) + dc.stwd_hit_i.eq(self.stwd_hit_i), + dc.load_v_i.eq(self.ld_pend_i), + dc.stor_v_i.eq(self.st_pend_i), ] # connect cell inputs using Cat(*list_of_stuff) - m.d.comb += [Cat(*load_l).eq(self.ld_pend_i), - Cat(*stor_l).eq(self.st_pend_i), - Cat(*issue_l).eq(self.issue_i), + m.d.comb += [Cat(*issue_l).eq(self.issue_i), Cat(*go_die_l).eq(self.go_die_i), ] # connect the load-hold-store / store-hold-load OR-accumulated outputs @@ -108,14 +104,14 @@ class LDSTDepMatrix(Elaboratable): # the load/store input also needs to be connected to "top" (vertically) for fu in range(self.n_ldst): - load_v_l = [] - stor_v_l = [] + load_h_l = [] + stor_h_l = [] for fux in range(self.n_ldst): dc = dm[fux] - load_v_l.append(dc.load_v_i[fu]) - stor_v_l.append(dc.stor_v_i[fu]) - m.d.comb += [Cat(*load_v_l).eq(self.ld_pend_i), - Cat(*stor_v_l).eq(self.st_pend_i), + load_h_l.append(dc.load_h_i) + stor_h_l.append(dc.stor_h_i) + m.d.comb += [Cat(*load_h_l).eq(self.ld_pend_i), + Cat(*stor_h_l).eq(self.st_pend_i), ] return m diff --git a/src/scoreboard/test_mem_fu_matrix.py b/src/scoreboard/test_mem_fu_matrix.py index 8d774020..9d2a7c6b 100644 --- a/src/scoreboard/test_mem_fu_matrix.py +++ b/src/scoreboard/test_mem_fu_matrix.py @@ -122,8 +122,8 @@ class MemFunctionUnits(Elaboratable): # Connect function issue / arrays, and dest/src1/src2 - comb += fumemdeps.go_st_i.eq(self.go_st_i) - comb += fumemdeps.go_ld_i.eq(self.go_ld_i) + comb += fumemdeps.go_st_i.eq(self.stwd_hit_i) + comb += fumemdeps.go_ld_i.eq(self.load_hit_i) comb += fumemdeps.go_die_i.eq(self.go_die_i) comb += fumemdeps.issue_i.eq(self.fn_issue_i) @@ -647,20 +647,26 @@ def mem_sim(dut): yield dut.ld_i.eq(0x1) yield dut.fn_issue_i.eq(0x1) yield - yield dut.ld_i.eq(0x0) + #yield dut.ld_i.eq(0x0) yield dut.st_i.eq(0x2) yield dut.fn_issue_i.eq(0x2) yield - yield dut.st_i.eq(0x0) + #yield dut.st_i.eq(0x0) yield dut.fn_issue_i.eq(0x0) yield - yield dut.load_hit_i.eq(0x2) + yield dut.load_hit_i.eq(0x1) + yield + yield dut.load_hit_i.eq(0x0) + yield + yield dut.stwd_hit_i.eq(0x2) + yield + yield dut.stwd_hit_i.eq(0x0) yield def test_mem_fus(): - dut = MemFunctionUnits(4) + dut = MemFunctionUnits(3) vl = rtlil.convert(dut, ports=dut.ports()) with open("test_mem_fus.il", "w") as f: f.write(vl) -- 2.30.2