From 619ae1255f5e0f4805e406479c1c67899c81124e Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 10 Nov 2020 19:44:09 +0000 Subject: [PATCH] add build commands to Makefile for versa ecp5 --- Makefile | 12 +++++++----- src/soc/litex/florent/Makefile | 6 ++++++ 2 files changed, 13 insertions(+), 5 deletions(-) diff --git a/Makefile b/Makefile index 9d7ae554..cd8c001d 100644 --- a/Makefile +++ b/Makefile @@ -18,14 +18,16 @@ develop: python3 src/soc/decoder/pseudo/pywriter.py run_sim: install - python3 src/soc/simple/issuer_verilog.py src/soc/litex/florent/\ - libresoc/libresoc.v + python3 src/soc/simple/issuer_verilog.py \ + src/soc/litex/florent/libresoc/libresoc.v python3 src/soc/litex/florent/sim.py --cpu=libresoc testgpio_run_sim: - python3 src/soc/simple/issuer_verilog.py src/soc/litex/florent/libresoc/\ - libresoc.v --enable-testgpio - python3 src/soc/litex/florent/sim.py --cpu=libresoc --variant=standardjtagtestgpio + python3 src/soc/simple/issuer_verilog.py \ + src/soc/litex/florent/libresoc/libresoc.v \ + --enable-testgpio + python3 src/soc/litex/florent/sim.py --cpu=libresoc \ + --variant=standardjtagtestgpio test: install python3 setup.py test # could just run nosetest3... diff --git a/src/soc/litex/florent/Makefile b/src/soc/litex/florent/Makefile index 4c889500..754d5d08 100644 --- a/src/soc/litex/florent/Makefile +++ b/src/soc/litex/florent/Makefile @@ -10,3 +10,9 @@ ls180: yosys -p 'read_ilang ls180_cvt.il' \ -p 'read_ilang libresoc_cvt.il' \ -p 'write_ilang ls180.il' + +versaecp5: + ./versa_ecp5.py --sys-clk-freq=55e6 --build + +versaecp5load: + ./versa_ecp5.py --sys-clk-freq=55e6 --load -- 2.30.2