From 620567c020d80a0585ffad37eb35508c59e47f8b Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 30 Mar 2022 10:27:44 +0100 Subject: [PATCH] nope, default features in Tercel WB Buses need to not set err yet --- src/soc/bus/tercel.py | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/soc/bus/tercel.py b/src/soc/bus/tercel.py index 10221823..328bf661 100644 --- a/src/soc/bus/tercel.py +++ b/src/soc/bus/tercel.py @@ -50,7 +50,8 @@ class Tercel(Elaboratable): # set up the wishbone busses if features is None: - features = frozenset({'err'}) + #features = frozenset({'err'}) # sigh + features = frozenset() if bus is None: bus = Interface(addr_width=spi_region_addr_width, data_width=data_width, @@ -138,7 +139,7 @@ class Tercel(Elaboratable): i_wishbone_stb=bus.stb, i_wishbone_cyc=bus.cyc, o_wishbone_ack=bus.ack, - o_wishbone_err=bus.err, + #o_wishbone_err=bus.err, # Configuration region Wishbone bus signals i_cfg_wishbone_adr=cfg_bus.adr, @@ -149,7 +150,7 @@ class Tercel(Elaboratable): i_cfg_wishbone_stb=cfg_bus.stb, i_cfg_wishbone_cyc=cfg_bus.cyc, o_cfg_wishbone_ack=cfg_bus.ack, - o_cfg_wishbone_err=cfg_bus.err, + #o_cfg_wishbone_err=cfg_bus.err, # QSPI signals o_spi_d_out=self.dq_out, -- 2.30.2