From e5b7f4b9110e40a268e38b9333630ffb5821c55f Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 8 Jun 2019 07:38:17 +0100 Subject: [PATCH 1/1] rename rsel vectors in mem dep cell --- src/scoreboard/mem_dependence_cell.py | 10 ++++++---- src/scoreboard/mem_fu_matrix.py | 4 ++-- src/scoreboard/test_mem_fu_matrix.py | 2 ++ 3 files changed, 10 insertions(+), 6 deletions(-) diff --git a/src/scoreboard/mem_dependence_cell.py b/src/scoreboard/mem_dependence_cell.py index e84b9d17..2958d864 100644 --- a/src/scoreboard/mem_dependence_cell.py +++ b/src/scoreboard/mem_dependence_cell.py @@ -16,8 +16,8 @@ class MemDepRow(Elaboratable): self.st_pend_i = Signal(n_reg, reset_less=True) # Read pend in (top) self.ld_pend_i = Signal(n_reg, reset_less=True) # Write pend in (top) - self.st_rsel_o = Signal(n_reg, reset_less=True) # Read pend out (bot) - self.ld_rsel_o = Signal(n_reg, reset_less=True) # Write pend out (bot) + self.v_st_rsel_o = Signal(n_reg, reset_less=True) # Read pend out (bot) + self.v_ld_rsel_o = Signal(n_reg, reset_less=True) # Write pend out (bot) self.go_ld_i = Signal(reset_less=True) # Go Write in (left) self.go_st_i = Signal(reset_less=True) # Go Read in (left) @@ -61,8 +61,8 @@ class MemDepRow(Elaboratable): # to be accumulated to indicate if register is in use (globally) # after ORing, is fed back in to st_pend_i / ld_pend_i - m.d.comb += self.st_rsel_o.eq(st_c.qlq) - m.d.comb += self.ld_rsel_o.eq(ld_c.qlq) + m.d.comb += self.v_st_rsel_o.eq(st_c.qlq) + m.d.comb += self.v_ld_rsel_o.eq(ld_c.qlq) return m @@ -75,6 +75,8 @@ class MemDepRow(Elaboratable): yield self.go_ld_i yield self.go_st_i yield self.go_die_i + yield self.v_ld_rsel_o + yield self.v_st_rsel_o yield self.ld_rsel_o yield self.st_rsel_o yield self.ld_fwd_o diff --git a/src/scoreboard/mem_fu_matrix.py b/src/scoreboard/mem_fu_matrix.py index dc88d358..98595996 100644 --- a/src/scoreboard/mem_fu_matrix.py +++ b/src/scoreboard/mem_fu_matrix.py @@ -132,8 +132,8 @@ class MemFUDepMatrix(Elaboratable): ld_pend_v = [] for fu in range(self.n_fu_row): dc = dm[fu] - st_pend_v.append(dc.st_rsel_o) - ld_pend_v.append(dc.ld_rsel_o) + st_pend_v.append(dc.v_st_rsel_o) + ld_pend_v.append(dc.v_ld_rsel_o) st_v = GlobalPending(self.n_reg_col, st_pend_v) ld_v = GlobalPending(self.n_reg_col, ld_pend_v) m.submodules.st_v = st_v diff --git a/src/scoreboard/test_mem_fu_matrix.py b/src/scoreboard/test_mem_fu_matrix.py index 015368fa..7d6120cf 100644 --- a/src/scoreboard/test_mem_fu_matrix.py +++ b/src/scoreboard/test_mem_fu_matrix.py @@ -645,9 +645,11 @@ def mem_sim(dut): yield dut.ld_i.eq(0x1) yield dut.fn_issue_i.eq(0x1) yield + yield dut.ld_i.eq(0x0) yield dut.st_i.eq(0x2) yield dut.fn_issue_i.eq(0x2) yield + yield dut.st_i.eq(0x0) yield dut.fn_issue_i.eq(0x0) yield -- 2.30.2