add coresync_clk to list of HTree
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 5 Jun 2021 11:09:54 +0000 (11:09 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 5 Jun 2021 11:09:54 +0000 (11:09 +0000)
commit913ad2a5a9145b15284fb7899d3aad90dd7a005a
treeacb8be8d8792aa0ff8c13e7721937d40bc71c771
parenta876c5dd61a53230de74b2ca2900e0e09490da95
add coresync_clk to list of HTree
experiments10_verilog/doDesign.py