a199daa4da6846ebe31ddf19fe9015248d712107
1 from lib2to3
.pytree
import Node
, Leaf
2 from lib2to3
.pgen2
import token
3 from lib2to3
.pygram
import python_symbols
as syms
5 preamble
= """# this file has been generated by sv2nmigen
7 from nmigen import Signal, Module, Const, Cat, Elaboratable
14 def port_decl_do_not_use(comment
, dt
, name
):
15 if dt
is None or dt
.dims
is None:
19 # XXX TODO, better checking, should be using data structure... *sigh*
20 width
= width
[1:-1] # strip brackets
21 width
= width
.split(':')
22 assert width
[0] == '0'
24 return 'self.%s = Signal(%s) # %s' % (name
, width
, comment
)
31 def __init__(self
, comment
, dt
, name
):
32 self
.comment
= comment
37 return port_decl_do_not_use(self
.comment
, self
.dt
, self
.name
)
41 def __init__(self
, left
, op
, right
):
48 def __init__(self
, outputfn
):
49 self
.outputfn
= outputfn
50 self
.outputfile
= None
56 if(self
.outputfile
is None):
57 self
.outputfile
= open(self
.outputfn
, "w")
58 self
.outputfile
.write(preamble
)
62 self
.outputfile
.write(str(p
)+"\n")
68 # m.d.comb += [l.eq(r)]
70 def indent(self
, count
):
72 return Leaf(token
.INDENT
, '>>> '*count
)
74 return Leaf(token
.INDENT
, ' '*4*count
)
76 def dedent(self
, count
):
77 return Leaf(token
.DEDENT
, '')
80 return Leaf(token
.NEWLINE
, '\n')
82 def port_decl(self
, comment
, dt
, name
):
83 port
= PortDecl(comment
, dt
, name
)
87 def isPort(self
, name
):
89 if(str(p
.name
) == str(name
)):
93 def initFunc(self
, ports
, params
):
94 params
= [Leaf(token
.LPAR
, '('), Leaf(
95 token
.NAME
, "self")] + [Leaf(token
.RPAR
, ')')]
96 # TODO handle sv params
97 fn
= [Leaf(token
.NAME
, 'def'),
98 Leaf(token
.NAME
, '__init__', prefix
=' '),
99 Node(syms
.parameters
, params
),
100 Leaf(token
.COLON
, ':'),
103 fndef
= Node(syms
.funcdef
, fn
)
104 stmts
= Node(syms
.stmt
, [fndef
])
106 stmts
.children
.append(self
.indent(2))
107 stmts
.children
.append(port
.initNode())
108 stmts
.children
.append(self
.nl())
111 def elaborateFunc(self
):
112 params
= [Leaf(token
.LPAR
, '('), Leaf(
113 token
.NAME
, "self, platform=None"), Leaf(token
.RPAR
, ')')]
114 fn
= [Leaf(token
.NAME
, 'def'),
115 Leaf(token
.NAME
, 'elaborate', prefix
=' '),
116 Node(syms
.parameters
, params
),
117 Leaf(token
.COLON
, ':'),
120 fndef
= Node(syms
.funcdef
, fn
)
121 stmts
= Node(syms
.stmt
, [fndef
])
122 stmts
.children
.append(self
.indent(2))
123 stmts
.children
.append(Leaf(token
.STRING
, "m = Module()"))
124 stmts
.children
.append(self
.nl())
128 hasdims
= (len(w
) >= 4)
129 stmts
.children
.append(self
.indent(2))
130 stmts
.children
.append(Leaf(token
.STRING
, wirename
))
131 stmts
.children
.append(Leaf(token
.STRING
, " = Signal("))
133 stmts
.children
.append(Leaf(token
.STRING
, str(w
[3])))
134 stmts
.children
.append(Leaf(token
.STRING
, ")"))
135 stmts
.children
.append(self
.nl())
137 for a
in self
.assign
:
138 stmts
.children
.append(self
.indent(2))
139 # m.d.sync += self.left.eq(right)
140 stmts
.children
.append(Leaf(token
.STRING
, "m.d.comb += "))
141 if(self
.isPort(a
.left
)):
142 stmts
.children
.append(Leaf(token
.STRING
, "self."))
143 stmts
.children
.append(Leaf(token
.STRING
, a
.left
))
144 stmts
.children
.append(Leaf(token
.STRING
, ".eq("))
145 if(self
.isPort(a
.right
)):
146 stmts
.children
.append(Leaf(token
.STRING
, "self."))
147 stmts
.children
.append(Leaf(token
.STRING
, a
.right
))
148 stmts
.children
.append(Leaf(token
.STRING
, ")"))
149 stmts
.children
.append(self
.nl())
151 # for a in self.assign:
157 stmts
.children
.append(self
.indent(2))
158 stmts
.children
.append(Leaf(token
.STRING
, "return m"))
159 stmts
.children
.append(self
.nl())
162 def module_1(self
, p
):
165 clsname
= [Leaf(token
.NAME
, 'class'),
166 Leaf(token
.NAME
, p
[4], prefix
=' '),
167 Leaf(token
.LPAR
, '('),
168 Leaf(token
.NAME
, 'Elaboratable'),
169 Leaf(token
.LPAR
, ')'),
170 Leaf(token
.COLON
, ':'),
174 suite
= Node(syms
.suite
, [Leaf(token
.NEWLINE
, '\n'),
176 self
.initFunc(ports
, params
),
181 clsdecl
= Node(syms
.classdef
, clsname
+ [suite
])
182 clsdecl
= Node(syms
.compound_stmt
, [clsdecl
])
184 self
.printpy(str(clsdecl
))
187 def module_item_2(self
, signaltype
, dims
, mlist
):
188 if(signaltype
== "wire"):
191 self
.wires
.append(m
+dims
)
195 def appendComments(self
, data
):
197 self
.outputfile
.write(data
)
198 #lines = data.split("\n")
200 # self.printpy("#"+line)
202 # combinatorical assign
203 def cont_assign_1(self
, p
):
204 # print("#ASSIGN:BROKEN"+str(list(p)))
205 self
.assign
+= [Assignment(p
[1], p
[2], p
[3])]