First setup for cocotb test run.
[libresoc-litex.git] / cocotb / test.py
1 import cocotb
2 from cocotb.clock import Clock
3 from cocotb.triggers import Timer
4 from cocotb.utils import get_sim_steps
5 from cocotb.binary import BinaryValue
6
7 from c4m.cocotb.jtag.c4m_jtag import JTAG_Master
8 from c4m.cocotb.jtag.c4m_jtag_svfcocotb import SVF_Executor
9
10 #
11 # Helper functions
12 #
13
14 def setup_sim(dut, *, clk_period, run):
15 """Initialize CPU and setup clock"""
16
17 clk_steps = get_sim_steps(clk_period, "ns")
18 cocotb.fork(Clock(dut.sys_clk, clk_steps).start())
19
20 dut.sys_rst <= 1
21 dut.sys_clk <= 0
22 if run:
23 yield Timer(int(10.5*clk_steps))
24 dut.sys_rst <= 0
25 yield Timer(int(5*clk_steps))
26
27 def setup_jtag(dut, *, tck_period):
28 # Make this a generator
29 if False:
30 yield Timer(0)
31 return JTAG_Master(dut.jtag_tck, dut.jtag_tms, dut.jtag_tdi, dut.jtag_tdo, clk_period=tck_period)
32
33 def execute_svf(dut, *, jtag, svf_filename):
34 jtag_svf = SVF_Executor(jtag)
35 with open(svf_filename, "r") as f:
36 svf_deck = f.read()
37 yield jtag_svf.run(svf_deck, p=dut._log.info)
38
39 #
40 # IDCODE using JTAG_master
41 #
42
43 def idcode(dut, *, jtag):
44 jtag.IDCODE = [0, 0, 0, 1]
45 yield jtag.idcode()
46 result1 = jtag.result
47 dut._log.info("IDCODE1: {}".format(result1))
48 assert(result1 == BinaryValue("00000000000000000001100011111111"))
49
50 yield jtag.idcode()
51 result2 = jtag.result
52 dut._log.info("IDCODE2: {}".format(result2))
53
54 assert(result1 == result2)
55
56 @cocotb.test()
57 def idcode_reset(dut):
58 dut._log.info("Running IDCODE test; cpu in reset...")
59
60 clk_period = 100 # 10MHz
61 tck_period = 300 # 3MHz
62
63 yield from setup_sim(dut, clk_period=clk_period, run=False)
64 jtag = yield from setup_jtag(dut, tck_period = tck_period)
65
66 yield from idcode(dut, jtag=jtag)
67
68 dut._log.info("IDCODE test completed")
69
70 @cocotb.test()
71 def idcode_run(dut):
72 dut._log.info("Running IDCODE test; cpu running...")
73
74 clk_period = 100 # 10MHz
75 tck_period = 300 # 3MHz
76
77 yield from setup_sim(dut, clk_period=clk_period, run=True)
78 jtag = yield from setup_jtag(dut, tck_period = tck_period)
79
80 yield from idcode(dut, jtag=jtag)
81
82 dut._log.info("IDCODE test completed")
83
84 #
85 # Read IDCODE from SVF file
86 #
87
88 @cocotb.test()
89 def idcodesvf_reset(dut):
90 dut._log.info("Running IDCODE through SVF test; cpu in reset...")
91
92 clk_period = 100 # 10MHz
93 tck_period = 300 # 3MHz
94
95 yield from setup_sim(dut, clk_period=clk_period, run=False)
96 jtag = yield from setup_jtag(dut, tck_period = tck_period)
97
98 yield from execute_svf(dut, jtag=jtag, svf_filename="idcode.svf")
99
100 dut._log.info("IDCODE test completed")
101
102 @cocotb.test()
103 def idcode_run(dut):
104 dut._log.info("Running IDCODE through test; cpu running...")
105
106 clk_period = 100 # 10MHz
107 tck_period = 300 # 3MHz
108
109 yield from setup_sim(dut, clk_period=clk_period, run=True)
110 jtag = yield from setup_jtag(dut, tck_period = tck_period)
111
112 yield from execute_svf(dut, jtag=jtag, svf_filename="idcode.svf")
113
114 dut._log.info("IDCODE test completed")
115