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HEAD
revamp hwacha; now runs in physical mode
[riscv-isa-sim.git]
/
hwacha
/
insns
/
vlsegstw.h
1
VEC_SEG_ST_LOAD
(
XPR
,
load_int32
,
XS2
,
4
);
projects / riscv-isa-sim.git / blob