reduce versa_ecp5 clock freq to 50 mhz, reduce bit-width of XICS addressing

[ls2.git] / hello_world / Makefile

diff --git a/hello_world/Makefile b/hello_world/Makefile
index 88c2fb7ed1452a3469e8704b8e914f3fb259871b..50f039112f54165f8f6f7421ac62be1661889576 100644 (file)
--- a/hello_world/Makefile
+++ b/hello_world/Makefile
@@ -5,7 +5,8 @@ ifneq ("$(ARCH)", "ppc64le")
 endif
 endif
 
-BOOT_INIT_BASE ?= 0xf0000000 # at QSPI address
+#BOOT_INIT_BASE ?= 0xf0000000 # at QSPI address
+BOOT_INIT_BASE ?= 0x00600000 # inside DRAM address space
 # BOOT_INIT_BASE ?= 0xff000000   # at ROM hi address (with coldboot firmware)
 # BOOT_INIT_BASE ?= 0x0        # start at zero (usual)