split out S-mode tests and M-mode tests

[riscv-tests.git] / isa / rv64sv / illegal_cfg_nfpr.S

diff --git a/isa/rv64sv/illegal_cfg_nfpr.S b/isa/rv64sv/illegal_cfg_nfpr.S
index 03227eb2a166dd9d4b356fb6dbc0db04e25df4c6..be114cc70b138513cb4981be4c3d28538811090c 100644 (file)
--- a/isa/rv64sv/illegal_cfg_nfpr.S
+++ b/isa/rv64sv/illegal_cfg_nfpr.S
@@ -13,9 +13,6 @@
 RVTEST_RV64SV
 RVTEST_CODE_BEGIN
 
-  la a3,handler
-  csrw stvec,a3 # set exception handler
-
   li a0,33
   slli a0,a0,6
   vsetcfg a0
@@ -24,7 +21,7 @@ vtcode2:
   add x2,x2,x3
   stop
 
-handler:
+stvec_handler:
   vxcptkill
 
   li TESTNUM,2