Add debug_module bus device.

[riscv-isa-sim.git] / riscv / decode.h

diff --git a/riscv/decode.h b/riscv/decode.h
index 9b9df5baa896a52e9f8efc65c888cc5b8fe0919a..5732a0d1c5b62bdff96468f2639f30fc3c0d3585 100644 (file)
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -14,7 +14,6 @@
 #include "config.h"
 #include "common.h"
 #include <cinttypes>
-#include "debug_rom/debug_rom.h"
 
 typedef int64_t sreg_t;
 typedef uint64_t reg_t;
@@ -238,11 +237,15 @@ private:
 #define DCSR_CAUSE_HALT         5
 
 #define DEBUG_START             0xfffffffffffff000
-#define DEBUG_RAM_START         0xfffffffffffffc00       // TODO: 0x400
-#define DEBUG_RAM_END           (DEBUG_RAM_START + 64)
 #define DEBUG_ROM_START         0xfffffffffffff800       // TODO: 0x800
+#define DEBUG_ROM_RESUME        (DEBUG_ROM_START + 4)
 #define DEBUG_ROM_END           (DEBUG_ROM_START + debug_rom_raw_len)
+#define DEBUG_RAM_START         0xfffffffffffffc00       // TODO: 0x400
+#define DEBUG_RAM_SIZE          64
+#define DEBUG_RAM_END           (DEBUG_RAM_START + DEBUG_RAM_SIZE)
 #define DEBUG_END               0xffffffffffffffff
+#define DEBUG_CLEARDEBINT       0xfffffffffffffef8
+#define DEBUG_SETHALTNOT        0xffffffffffffff00
 #define DEBUG_SIZE              (DEBUG_END - DEBUG_START + 1)
 
 #endif